On Tue, Oct 27, 2015 at 5:31 AM, Peter Maydell <peter.mayd...@linaro.org>
wrote:
> On 25 October 2015 at 23:13, Peter Crosthwaite
> <crosthwaitepe...@gmail.com> wrote:
> > Add a Linux-specific pre-boot routine that matches the device
> > specific bootloaders behaviour. This is needed for modern Linux that
> > expects the ARM PLL in SLCR to be a more even value (not 26).
> >
> > Cc: Alistair Francis <alistair.fran...@xilinx.com>
> > Signed-off-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com>
> > ---
> > Changed since RFC:
> > Use bootloader callback to load blob.
> > Change "firmware" to "board-setup" for consistency.
> >
> > hw/arm/xilinx_zynq.c | 40 +++++++++++++++++++++++++++++++++++++++-
> > 1 file changed, 39 insertions(+), 1 deletion(-)
> >
> > diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
> > index 9f89483..8c249e8 100644
> > --- a/hw/arm/xilinx_zynq.c
> > +++ b/hw/arm/xilinx_zynq.c
> > @@ -43,6 +43,41 @@ static const int dma_irqs[8] = {
> > 46, 47, 48, 49, 72, 73, 74, 75
> > };
> >
> > +#define BOARD_SETUP_ADDR 0x0
> > +#define LOAD_ADDR 0x1000
> > +
> > +#define SLCR_LOCK_OFFSET 0x004
> > +#define SLCR_UNLOCK_OFFSET 0x008
> > +#define SLCR_ARM_PLL_OFFSET 0x100
> > +
> > +#define SLCR_XILINX_UNLOCK_KEY 0xdf0d
> > +#define SLCR_XILINX_LOCK_KEY 0x767b
> > +
>
Something like:
/* Write immediate val to address r0 + addr. r0 should contain base offset
of SLCR block.
* Clobbers r1.
*/
#define SLCR_WRITE(addr, val) \
0xe3a01000 + extract32((val), 0, 8), /* mov r1, val & (FF << 0) */ \
0xe3811c00 + extract32((val), 8, 8), /* orr r1, r1, val & (FF << 8)
*/ \
0xe3811800 + extract32((val), 16, 8), /* orr r1, r1, val & (FF <<
16) */ \
0xe3811400 + extract32((val), 24, 8), /* orr r1, r1, val & (FF <<
24) */ \
0xe5801000 + (addr) /* str r0, r1, #addr */
This could use a comment about what these insns are...
>
> Not ending the macro with a trailing comma would make the
> uses of it below look a bit more natural (since they then
> have the comma sort of how you'd expect).
>
>
Will fix.
> > +
> > +static void zynq_write_board_setup(ARMCPU *cpu,
> > + const struct arm_boot_info *info)
> > +{
> > + int n;
> > + uint32_t board_setup_blob[] = {
> > + 0xe3a004f8, /* mov r0, #0xf8000000 */
> > + SLCR_WRITE(SLCR_UNLOCK_OFFSET, SLCR_XILINX_UNLOCK_KEY)
> > + SLCR_WRITE(SLCR_ARM_PLL_OFFSET, 0x00014008)
> > + SLCR_WRITE(SLCR_LOCK_OFFSET, SLCR_XILINX_LOCK_KEY)
> > + 0xe12fff1e, /* bx lr */
> > + };
> > + for (n = 0; n < ARRAY_SIZE(board_setup_blob); n++) {
> > + board_setup_blob[n] = tswap32(board_setup_blob[n]);
> > + }
> > + rom_add_blob_fixed("board-setup", board_setup_blob,
> > + sizeof(board_setup_blob), BOARD_SETUP_ADDR);
> > +}
> > +
> > static struct arm_boot_info zynq_binfo = {};
> >
> > static void gem_init(NICInfo *nd, uint32_t base, qemu_irq irq)
> > @@ -251,7 +286,10 @@ static void zynq_init(MachineState *machine)
> > zynq_binfo.initrd_filename = initrd_filename;
> > zynq_binfo.nb_cpus = 1;
> > zynq_binfo.board_id = 0xd32;
> > - zynq_binfo.loader_start = 0;
> > + zynq_binfo.loader_start = LOAD_ADDR;
> > + zynq_binfo.board_setup_addr = BOARD_SETUP_ADDR;
> > + zynq_binfo.write_board_setup = zynq_write_board_setup;
> > +
> > arm_load_kernel(ARM_CPU(first_cpu), &zynq_binfo);
> > }
> >
> > --
> > 1.9.1
>
> Otherwise
> Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
>
>
Thanks.
Regards,
Peter
> thanks
> -- PMM
>
