[Qemu-devel] [RFC 4/4] arm: allwinner-a10: Add SATA

[Peter Crosthwaite]

Add the Allwinner A10 AHCI controller module to the SoC.

Signed-off-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com>
---
 hw/arm/allwinner-a10.c         | 11 +++++++++++
 include/hw/arm/allwinner-a10.h |  5 +++++
 2 files changed, 16 insertions(+)

diff --git a/hw/arm/allwinner-a10.c b/hw/arm/allwinner-a10.c
index 56e924d..145038d 100644
--- a/hw/arm/allwinner-a10.c
+++ b/hw/arm/allwinner-a10.c
@@ -42,6 +42,9 @@ static void aw_a10_init(Object *obj)
 
     object_initialize(&s->ccm, sizeof(s->ccm), TYPE_AW_A10_CCM);
     qdev_set_parent_bus(DEVICE(&s->ccm), sysbus_get_default());
+
+    object_initialize(&s->sata, sizeof(s->sata), TYPE_ALLWINNER_AHCI);
+    qdev_set_parent_bus(DEVICE(&s->sata), sysbus_get_default());
 }
 
 static void aw_a10_realize(DeviceState *dev, Error **errp)
@@ -104,6 +107,14 @@ static void aw_a10_realize(DeviceState *dev, Error **errp)
     sysbusdev = SYS_BUS_DEVICE(&s->ccm);
     sysbus_mmio_map(sysbusdev, 0, AW_A10_CCM_REG_BASE);
 
+    object_property_set_bool(OBJECT(&s->sata), true, "realized", &err);
+    if (err) {
+        error_propagate(errp, err);
+        return;
+    }
+    sysbus_mmio_map(SYS_BUS_DEVICE(&s->sata), 0, AW_A10_SATA_BASE);
+    sysbus_connect_irq(SYS_BUS_DEVICE(&s->sata), 0, s->irq[56]);
+
     /* FIXME use a qdev chardev prop instead of serial_hds[] */
     serial_mm_init(get_system_memory(), AW_A10_UART0_REG_BASE, 2, s->irq[1],
                    115200, serial_hds[0], DEVICE_NATIVE_ENDIAN);
diff --git a/include/hw/arm/allwinner-a10.h b/include/hw/arm/allwinner-a10.h
index 88632c0..e0daff8 100644
--- a/include/hw/arm/allwinner-a10.h
+++ b/include/hw/arm/allwinner-a10.h
@@ -8,6 +8,8 @@
 #include "hw/intc/allwinner-a10-pic.h"
 #include "hw/net/allwinner_emac.h"
 #include "hw/misc/allwinner-a10-ccm.h"
+#include "hw/ide/pci.h"
+#include "hw/ide/ahci.h"
 
 #include "sysemu/sysemu.h"
 #include "exec/address-spaces.h"
@@ -18,6 +20,7 @@
 #define AW_A10_PIT_REG_BASE     0x01c20c00
 #define AW_A10_UART0_REG_BASE   0x01c28000
 #define AW_A10_EMAC_BASE        0x01c0b000
+#define AW_A10_SATA_BASE        0x01c18000
 
 #define AW_A10_SDRAM_BASE       0x40000000
 
@@ -35,6 +38,8 @@ typedef struct AwA10State {
     AwA10PICState intc;
     AwEmacState emac;
     AwA10CCMState ccm;
+
+    AllwinnerAHCIState sata;
 } AwA10State;
 
 #define ALLWINNER_H_
-- 
1.9.1