On 4 October 2015 at 22:39, Peter Crosthwaite <crosthwaitepe...@gmail.com> wrote: > On Sun, Oct 4, 2015 at 12:56 PM, Beniamino Galvani <b.galv...@gmail.com> > wrote: >> Ignoring attempt to switch CPSR_A flag from non-secure world with SCR.AW bit >> clear >> Ignoring attempt to switch CPSR_F flag from non-secure world with SCR.FW bit >> clear >> >> which probably would be solved by setting the property 'has_el3' of >> the CPU to false before realization. >> > > That sounds like a bug and should definately be fixed. We should have > cpus that do support EL3 saying they dont (due to legacy and lack of > testing) but not the other way round.
The Allwinner really does have EL3, so we are correct in not setting has_el3 to false. We should figure out what's actually happening here and fix whatever the underlying problem is. (Possibly the real board firmware hands control of FIQ and Abort to an NS kernel by setting SCR.AW/FW, which our built in loader doesn't do? Or the guest really is buggy, or perhaps our GUEST_ERROR logging is a bit overenthusiastic.) thanks -- PMM
