On 2 October 2015 at 13:38, Sergey Sorokin <afaral...@yandex.ru> wrote: > If any store instruction writes the code inside the same TB > after this store insn, the execution of the TB must be stopped > to execute new code correctly. > As described in ARMv8 manual D3.4.6 a self-modified code need to do > IC invalidation to be valid, and ISB after it. So it's enough to end the TB > after ISB instruction on the code translation. > Also this TB break is necessary to take any pending interrupts immediately > according to ARMv8 ARM D1.14.4. > > Signed-off-by: Sergey Sorokin <afaral...@yandex.ru> > --- > Changes since previous version: > * ARMv6 ISB was also fixed. > * Second reason for TB breaking was mentioned in comments > and the commit message. > * A compilation error was fixed. > > target-arm/helper.c | 6 +++++- > target-arm/translate-a64.c | 8 +++++++- > target-arm/translate.c | 17 +++++++++++++++-- > 3 files changed, 27 insertions(+), 4 deletions(-)
Applied to target-arm.next, thanks. -- PMM
