On 29 September 2015 at 07:00, Alex Bennée <alex.ben...@linaro.org> wrote: > > Sergey Fedorov <serge.f...@gmail.com> writes: > >> Signed-off-by: Sergey Fedorov <serge.f...@gmail.com> >> --- >> >> This patch is a prerequisite for a debug exception routing patch: >> https://lists.gnu.org/archive/html/qemu-devel/2015-09/msg03542.html >> >> target-arm/cpu-qom.h | 1 + >> target-arm/cpu.c | 1 + >> target-arm/cpu.h | 1 + >> target-arm/cpu64.c | 1 + >> target-arm/helper.c | 13 +++++++++++++ >> 5 files changed, 17 insertions(+) >> >> diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h >> index 25fb1ce..d2b0769 100644 >> --- a/target-arm/cpu-qom.h >> +++ b/target-arm/cpu-qom.h >> @@ -167,6 +167,7 @@ typedef struct ARMCPU { >> uint64_t id_aa64mmfr0; >> uint64_t id_aa64mmfr1; >> uint32_t dbgdidr; >> + uint32_t mdcr; >> uint32_t clidr; >> uint64_t mp_affinity; /* MP ID without feature bits */ >> /* The elements of this array are the CCSIDR values for each cache, >> diff --git a/target-arm/cpu.c b/target-arm/cpu.c >> index d7b4445..6474c0d 100644 >> --- a/target-arm/cpu.c >> +++ b/target-arm/cpu.c >> @@ -1125,6 +1125,7 @@ static void cortex_a15_initfn(Object *obj) >> cpu->id_isar3 = 0x11112131; >> cpu->id_isar4 = 0x10011142; >> cpu->dbgdidr = 0x3515f021; >> + cpu->mdcr = 0x00000006; >> cpu->clidr = 0x0a200023; >> cpu->ccsidr[0] = 0x701fe00a; /* 32K L1 dcache */ >> cpu->ccsidr[1] = 0x201fe00a; /* 32K L1 icache */ >> diff --git a/target-arm/cpu.h b/target-arm/cpu.h >> index 1b80516..d57ed20 100644 >> --- a/target-arm/cpu.h >> +++ b/target-arm/cpu.h >> @@ -380,6 +380,7 @@ typedef struct CPUARMState { >> uint64_t dbgwvr[16]; /* watchpoint value registers */ >> uint64_t dbgwcr[16]; /* watchpoint control registers */ >> uint64_t mdscr_el1; >> + uint64_t mdcr_el2; > > Given we already have banked el3 regs shouldn't this be: > > uint64_6 mdcr_el[4] > > ?
You could argue either way, but since there's only an MDCR_EL2 and an MDCR_EL3 and they're not really the same field format there won't be any code that wants to do mdcr_el[x], so I think calling the field mdcr_el2 is ok. -- PMM
