Reviewed-by: Aurelien Jarno <aurel...@aurel32.net> Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> Signed-off-by: Richard Henderson <r...@twiddle.net> --- target-sh4/cpu.h | 1 + target-sh4/translate.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h index 1f68b27..ea854cb 100644 --- a/target-sh4/cpu.h +++ b/target-sh4/cpu.h @@ -122,6 +122,7 @@ typedef struct tlb_t { #define ITLB_SIZE 4 #define NB_MMU_MODES 2 +#define TARGET_INSN_START_EXTRA_WORDS 1 enum sh_features { SH_FEATURE_SH4A = 1, diff --git a/target-sh4/translate.c b/target-sh4/translate.c index 53bf9e8..efaa6f6 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -1860,7 +1860,7 @@ gen_intermediate_code_internal(SuperHCPU *cpu, TranslationBlock *tb, tcg_ctx.gen_opc_instr_start[ii] = 1; tcg_ctx.gen_opc_icount[ii] = num_insns; } - tcg_gen_insn_start(ctx.pc); + tcg_gen_insn_start(ctx.pc, ctx.flags); num_insns++; if (unlikely(cpu_breakpoint_test(cs, ctx.pc, BP_ANY))) { -- 2.4.3