On 09/14/2015 05:45 AM, Leon Alrae wrote:
> -static inline void gen_mfc0_load64 (TCGv arg, target_ulong off)
> -{
> - tcg_gen_ld_tl(arg, cpu_env, off);
> - tcg_gen_ext32s_tl(arg, arg);
> -}
> -
> static inline void gen_mtc0_store32 (TCGv arg, target_ulong off)
> {
> TCGv_i32 t0 = tcg_temp_new_i32();
> @@ -4972,17 +4966,19 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int
> reg, int sel)
> break;
> case 4:
> CP0_CHECK(ctx->insn_flags & ASE_MT);
> - gen_mfc0_load64(arg, offsetof(CPUMIPSState, CP0_YQMask));
> + tcg_gen_ld32s_tl(arg, cpu_env, offsetof(CPUMIPSState,
> CP0_YQMask));
> rn = "YQMask";
> break;
This change is broken for 64-bit guest and big-endian host -- one has to adjust
the offset in that case. I suspect that's why the extension was separate to
begin with...
r~
