On 2 September 2015 at 18:57, Richard Henderson <r...@twiddle.net> wrote:
> For !SF, this initial ext32u can't be optimized away by the
> current TCG code generator. (It would require backward bit
> liveness propagation.)
>
> But since the range of bits for !SF are already constrained by
> unallocated_encoding, we'll never reference the high bits anyway.
>
> Signed-off-by: Richard Henderson <r...@twiddle.net>
> ---
> target-arm/translate-a64.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
> index 8c94edf..10f8825 100644
> --- a/target-arm/translate-a64.c
> +++ b/target-arm/translate-a64.c
> @@ -2997,7 +2997,11 @@ static void disas_bitfield(DisasContext *s, uint32_t
> insn)
> }
>
> tcg_rd = cpu_reg(s, rd);
> - tcg_tmp = read_cpu_reg(s, rn, sf);
> +
> + /* Suppress the zero-extend for !sf. Since RI and SI are constrained
> + to be smaller than bitsize, we'll never reference data outside the
> + low 32-bits anyway. */
> + tcg_tmp = read_cpu_reg(s, rn, 1);
>
> /* Recognize the common aliases. */
> if (opc == 0) { /* SBFM */
> -
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
thanks
-- PMM
