[Qemu-devel] [PATCH] target-mips: Fix RDHWR on CP0.Count

[Alex Smith]

For RDHWR on the CP0.Count register, env->CP0_Count was being returned.
This value is a delta against the QEMU_CLOCK_VIRTUAL clock, not the
correct current value of CP0.Count. Use cpu_mips_get_count() instead.

Signed-off-by: Alex Smith <alex.sm...@imgtec.com>
Cc: Aurelien Jarno <aurel...@aurel32.net>
Cc: Leon Alrae <leon.al...@imgtec.com>
---
 target-mips/op_helper.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index 809a061e296b..6fe00201c10d 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -2185,7 +2185,7 @@ target_ulong helper_rdhwr_cc(CPUMIPSState *env)
 {
     if ((env->hflags & MIPS_HFLAG_CP0) ||
         (env->CP0_HWREna & (1 << 2)))
-        return env->CP0_Count;
+        return (int32_t)cpu_mips_get_count(env);
     else
         helper_raise_exception(env, EXCP_RI);
 
-- 
2.5.0