On 09/03/2015 02:17 AM, Richard Henderson wrote:
This avoids having to keep merging and extracting the flag from SR.
Signed-off-by: Richard Henderson <r...@twiddle.net>
---
target-openrisc/cpu.h | 15 +++++-
target-openrisc/gdbstub.c | 4 +-
target-openrisc/interrupt.c | 2 +-
target-openrisc/interrupt_helper.c | 2 +-
target-openrisc/sys_helper.c | 5 +-
target-openrisc/translate.c | 96 +++++++++++++++-----------------------
6 files changed, 56 insertions(+), 68 deletions(-)
diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h
index 36c4f20..e91f2a9 100644
--- a/target-openrisc/cpu.h
+++ b/target-openrisc/cpu.h
@@ -288,7 +288,8 @@ typedef struct CPUOpenRISCState {
target_ulong epcr; /* Exception PC register */
target_ulong eear; /* Exception EA register */
- uint32_t sr; /* Supervisor register */
+ target_ulong sr_f; /* the SR_F bit */
A comment that states the expected value of sr_f would be nice.
Other then that,
Reviewed-by: Bastian Koppelmann <kbast...@mail.uni-paderborn.de>
