On Mon, Aug 31, 2015 at 1:54 PM, John Snow <js...@redhat.com> wrote:
>
>
> On 08/28/2015 08:04 PM, Alistair Francis wrote:
>> Connect the Sysbus AHCI device to ZynqMP.
>>
>> Signed-off-by: Alistair Francis <alistair.fran...@xilinx.com>
>> Reviewed-by: Sai Pavan Boddu <saip...@xilinx.com>
>> ---
>> V6:
>> - Fix up Macros
>> V2:
>> - Marcoify the number of SATA prts
>> - Change the error for setting num-ports to error_abort
>>
>> hw/arm/xlnx-zynqmp.c | 18 ++++++++++++++++++
>> include/hw/arm/xlnx-zynqmp.h | 3 +++
>> 2 files changed, 21 insertions(+), 0 deletions(-)
>>
>> diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
>> index 6756c74..90b2aca 100644
>> --- a/hw/arm/xlnx-zynqmp.c
>> +++ b/hw/arm/xlnx-zynqmp.c
>> @@ -28,6 +28,10 @@
>> #define GIC_DIST_ADDR 0xf9010000
>> #define GIC_CPU_ADDR 0xf9020000
>>
>> +#define SATA_INTR 133
>> +#define SATA_ADDR 0xFD0C0000
>> +#define SATA_NUM_PORTS 2
>> +
>> static const uint64_t gem_addr[XLNX_ZYNQMP_NUM_GEMS] = {
>> 0xFF0B0000, 0xFF0C0000, 0xFF0D0000, 0xFF0E0000,
>> };
>> @@ -90,6 +94,9 @@ static void xlnx_zynqmp_init(Object *obj)
>> object_initialize(&s->uart[i], sizeof(s->uart[i]),
>> TYPE_CADENCE_UART);
>> qdev_set_parent_bus(DEVICE(&s->uart[i]), sysbus_get_default());
>> }
>> +
>> + object_initialize(&s->sata, sizeof(s->sata), TYPE_SYSBUS_AHCI);
>> + qdev_set_parent_bus(DEVICE(&s->sata), sysbus_get_default());
>> }
>>
>> static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
>> @@ -240,6 +247,17 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error
>> **errp)
>> sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0,
>> gic_spi[uart_intr[i]]);
>> }
>> +
>> + object_property_set_int(OBJECT(&s->sata), SATA_NUM_PORTS, "num-ports",
>> + &error_abort);
>> + object_property_set_bool(OBJECT(&s->sata), true, "realized", &err);
>> + if (err) {
>> + error_propagate((errp), (err));
>> + return;
>> + }
>> +
>> + sysbus_mmio_map(SYS_BUS_DEVICE(&s->sata), 0, SATA_ADDR);
>> + sysbus_connect_irq(SYS_BUS_DEVICE(&s->sata), 0, gic_spi[SATA_INTR]);
>> }
>>
>> static Property xlnx_zynqmp_props[] = {
>> diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
>> index 6ccb57b..97622ec 100644
>> --- a/include/hw/arm/xlnx-zynqmp.h
>> +++ b/include/hw/arm/xlnx-zynqmp.h
>> @@ -22,6 +22,8 @@
>> #include "hw/intc/arm_gic.h"
>> #include "hw/net/cadence_gem.h"
>> #include "hw/char/cadence_uart.h"
>> +#include "hw/ide/pci.h"
>> +#include "hw/ide/ahci.h"
>>
>> #define TYPE_XLNX_ZYNQMP "xlnx,zynqmp"
>> #define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \
>> @@ -60,6 +62,7 @@ typedef struct XlnxZynqMPState {
>>
>> CadenceGEMState gem[XLNX_ZYNQMP_NUM_GEMS];
>> CadenceUARTState uart[XLNX_ZYNQMP_NUM_UARTS];
>> + SysbusAHCIState sata;
>>
>> char *boot_cpu;
>> ARMCPU *boot_cpu_ptr;
>>
>
> For some reason, this patch never made it to the qemu-devel archives for
> either v5 or v6. I only received a direct copy to my inbox, but the
> mailer daemon seems to have dropped this patch for ... some reason or
> another.
I just noticed the same thing. I talked to Xilinx IT and they say that the email
was delivered from our servers. Is there a way to check to see what happened
on the QEMU mailing list side?
Thanks,
Alistair
>
> --js
>
