On Sat, Aug 15, 2015 at 2:29 PM, Peter Crosthwaite
<crosthwaitepe...@gmail.com> wrote:
> On Mon, Jul 27, 2015 at 11:37 AM, Alistair Francis
> <alistair.fran...@xilinx.com> wrote:
>> Connect the Sysbus AHCI device to ZynqMP.
>>
>> Signed-off-by: Alistair Francis <alistair.fran...@xilinx.com>
>> Reviewed-by: Sai Pavan Boddu <saip...@xilinx.com>
>> ---
>> hw/arm/xlnx-zynqmp.c | 20 ++++++++++++++++++++
>> include/hw/arm/xlnx-zynqmp.h | 3 +++
>> 2 files changed, 23 insertions(+), 0 deletions(-)
>>
>> diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
>> index 62ef4ce..7adcce9 100644
>> --- a/hw/arm/xlnx-zynqmp.c
>> +++ b/hw/arm/xlnx-zynqmp.c
>> @@ -28,6 +28,9 @@
>> #define GIC_DIST_ADDR 0xf9010000
>> #define GIC_CPU_ADDR 0xf9020000
>>
>> +#define SYSBUS_AHCI_ADDR 0xFD0C0000
>> +#define SYSBUS_AHCI_INTR 133
>> +
>> static const uint64_t gem_addr[XLNX_ZYNQMP_NUM_GEMS] = {
>> 0xFF0B0000, 0xFF0C0000, 0xFF0D0000, 0xFF0E0000,
>> };
>> @@ -90,6 +93,9 @@ static void xlnx_zynqmp_init(Object *obj)
>> object_initialize(&s->uart[i], sizeof(s->uart[i]),
>> TYPE_CADENCE_UART);
>> qdev_set_parent_bus(DEVICE(&s->uart[i]), sysbus_get_default());
>> }
>> +
>> + object_initialize(&s->sata, sizeof(s->sata), TYPE_SYSBUS_AHCI);
>> + qdev_set_parent_bus(DEVICE(&s->sata), sysbus_get_default());
>> }
>>
>> static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
>> @@ -235,6 +241,20 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error
>> **errp)
>> sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0,
>> gic_spi[uart_intr[i]]);
>> }
>> +
>> + object_property_set_int(OBJECT(&s->sata), 2, "num-ports", &err);
>
> 2 Should get a macro up top.
Ok, will fix
>
>> + if (err) {
>> + error_propagate((errp), (err));
>> + return;
>> + }
>
> What is the user visible failure case here? I think this can be
> error_abort'ed. I think some of the others in the file (mainly the
> reset-cbar one) could be error_aborted as well.
Fair point. I was just following what most of the others do. Thinking
about it I agree that pretty much all of the non-realise calls should
just abort. I'll fix this and the others in the next version.
Thanks,
Alistair
>
> Regards,
> Peter
>
>> + object_property_set_bool(OBJECT(&s->sata), true, "realized", &err);
>> + if (err) {
>> + error_propagate((errp), (err));
>> + return;
>> + }
>> +
>> + sysbus_mmio_map(SYS_BUS_DEVICE(&s->sata), 0, SYSBUS_AHCI_ADDR);
>> + sysbus_connect_irq(SYS_BUS_DEVICE(&s->sata), 0,
>> gic_spi[SYSBUS_AHCI_INTR]);
>> }
>>
>> static Property xlnx_zynqmp_props[] = {
>> diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
>> index c379632..024e316 100644
>> --- a/include/hw/arm/xlnx-zynqmp.h
>> +++ b/include/hw/arm/xlnx-zynqmp.h
>> @@ -22,6 +22,8 @@
>> #include "hw/intc/arm_gic.h"
>> #include "hw/net/cadence_gem.h"
>> #include "hw/char/cadence_uart.h"
>> +#include "hw/ide/pci.h"
>> +#include "hw/ide/ahci.h"
>>
>> #define TYPE_XLNX_ZYNQMP "xlnx,zynqmp"
>> #define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \
>> @@ -54,6 +56,7 @@ typedef struct XlnxZynqMPState {
>> MemoryRegion gic_mr[XLNX_ZYNQMP_GIC_REGIONS][XLNX_ZYNQMP_GIC_ALIASES];
>> CadenceGEMState gem[XLNX_ZYNQMP_NUM_GEMS];
>> CadenceUARTState uart[XLNX_ZYNQMP_NUM_UARTS];
>> + SysbusAHCIState sata;
>>
>> char *boot_cpu;
>> ARMCPU *boot_cpu_ptr;
>> --
>> 1.7.1
>>
>>
>
