On 06/08/15 09:00, Alexey Kardashevskiy wrote: > On 08/06/2015 04:33 PM, Thomas Huth wrote: >> On 06/08/15 07:25, Alexey Kardashevskiy wrote: >>> At the moment get_monitor_def() prints only registers from monitor_defs. >>> However there is a lot of BOOK3S SPRs which are not in the list and >>> cannot be printed. >>> >>> This makes use of the new get_monitor_def() callback and prints all >>> registered SPRs and fails on unregistered ones proving the user >>> information on what is actually supported in the running CPU. >>> >>> Signed-off-by: Alexey Kardashevskiy <a...@ozlabs.ru> >>> --- >>> monitor.c | 215 >>> +------------------------------------------- >>> target-ppc/cpu-qom.h | 2 + >>> target-ppc/translate.c | 72 +++++++++++++++ >>> target-ppc/translate_init.c | 1 + >>> 4 files changed, 76 insertions(+), 214 deletions(-) >> ... >>> diff --git a/target-ppc/translate.c b/target-ppc/translate.c >>> index 84c5cea..f4acafb 100644 >>> --- a/target-ppc/translate.c >>> +++ b/target-ppc/translate.c >>> @@ -11401,6 +11401,78 @@ void ppc_cpu_dump_statistics(CPUState *cs, >>> FILE*f, >>> #endif >>> } >>> >>> +static int ppc_cpu_get_reg(target_ulong *regs, const char *numstr, >>> int maxnum, >>> + uint64_t *pval) >> >> Don't you break the 32-bit QEMU (ppc-softmmu instead of ppc64-softmmu) >> here? Since pval is uint64_t but the registers are target_ulong = 32 >> bit ? > > > I cannot see how I break it - 64bit is enough for both, 32bit will just > have upper bits set to zero.
Ah, stupid me, I somehow mixed up the pval and the regs pointer ... never mind! Thomas
