On 07/23/15 15:35, Peter Maydell wrote: > On 23 July 2015 at 14:13, Laszlo Ersek <ler...@redhat.com> wrote: >> On 07/22/15 19:18, Kevin O'Connor wrote: >>> Another possibility would be to place the new fw_cfg dma register >>> address into a named fw_cfg "file" (eg, "fw_cfg_dma"). The firmware >>> could then use the existing select/data fw_cfg interface to check if >>> the new dma interface is available by scanning for that "fw_cfg_dma" >>> file. This has the advantage of not requiring a new "magic address", >>> but has the disadvantage of a more complex probe. >> >> I like this one so much that I'm worried I'm missing some details. :) > > This requires the device itself to know its own address, which > is in QEMU possible but ugly enough to be worth avoiding. > > For ARM MMIO the obvious answer is "the new register should > just go next to the first one". Does x86 do something that > means we can't put it somewhere equally straightforward > or do discovery via whatever x86 uses for discovering MMIO?
I don't know how x86 determines the MMIO mapping. As far as I gather from the SeaBIOS patches and this QEMU series, 0xfef00000 is a hand-picked fixed address. (See BIOS_CFG_DMA_ADDR in 7/7.) 0xfef00000 seems to fall right above the 1MB LAPIC range; I guess there's no conflict with anything else... Thanks Laszlo
