On 2015-06-30 15:44, Yongbok Kim wrote: > MSACSR.Cause bits are needed to be cleared before a vector floating-point > instructions. > FEXDO.df, FEXUPL.df and FEXUPR.df were missed out. > > Signed-off-by: Yongbok Kim <yongbok....@imgtec.com> > --- > target-mips/msa_helper.c | 6 ++++++ > 1 files changed, 6 insertions(+), 0 deletions(-)
Reviewed-by: Aurelien Jarno <aurel...@aurel32.net> -- Aurelien Jarno GPG: 4096R/1DDD8C9B aurel...@aurel32.net http://www.aurel32.net
