On Wed, Jun 3, 2015 at 10:08 AM, Paolo Bonzini <pbonz...@redhat.com> wrote:
> Different CPUs can be in SMM or not at the same time, thus they
> will see different things where the chipset places SMRAM.
>
> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>
> ---
> target-i386/cpu-qom.h | 1 +
> target-i386/cpu.c | 14 ++++++++++++++
> 2 files changed, 15 insertions(+)
>
> diff --git a/target-i386/cpu-qom.h b/target-i386/cpu-qom.h
> index 31a0c1e..39cd878 100644
> --- a/target-i386/cpu-qom.h
> +++ b/target-i386/cpu-qom.h
> @@ -111,6 +111,7 @@ typedef struct X86CPU {
> /* in order to simplify APIC support, we leave this pointer to the
> user */
> struct DeviceState *apic_state;
> + struct MemoryRegion *cpu_as_root;
> } X86CPU;
>
> static inline X86CPU *x86_env_get_cpu(CPUX86State *env)
> diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> index 523d0cd..23b57a9 100644
> --- a/target-i386/cpu.c
> +++ b/target-i386/cpu.c
> @@ -44,6 +44,7 @@
> #include "hw/qdev-properties.h"
> #include "hw/cpu/icc_bus.h"
> #ifndef CONFIG_USER_ONLY
> +#include "exec/address-spaces.h"
> #include "hw/xen/xen.h"
> #include "hw/i386/apic_internal.h"
> #endif
> @@ -2811,6 +2812,18 @@ static void x86_cpu_realizefn(DeviceState *dev, Error
> **errp)
> #endif
>
> mce_init(cpu);
> +
> +#ifndef CONFIG_USER_ONLY
> + if (tcg_enabled()) {
> + cpu->cpu_as_root = g_new(MemoryRegion, 1);
> + cs->as = g_new(AddressSpace, 1);
> + memory_region_init_alias(cpu->cpu_as_root, OBJECT(cpu), "memory",
> + get_system_memory(), 0, ~0ull);
> + memory_region_set_enabled(cpu->cpu_as_root, true);
> + address_space_init(cs->as, cpu->cpu_as_root, "CPU");
> + }
> +#endif
> +
> qemu_init_vcpu(cs);
>
> /* Only Intel CPUs support hyperthreading. Even though QEMU fixes this
> @@ -2834,6 +2847,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error
> **errp)
> cpu_reset(cs);
>
> xcc->parent_realize(dev, &local_err);
> +
This intentional?
Regards,
Peter
> out:
> if (local_err != NULL) {
> error_propagate(errp, local_err);
> --
> 2.4.1
>
>
>
