On Mon, May 25, 2015 at 06:34:01PM +0300, Marcel Apfelbaum wrote:
> PXB does not work with unsupported bioses, but should
> not interfere with normal OS operation.
> We don't ship them anymore, but it's reasonable
> to keep the work-around until we update the bios in qemu.
We already did, did we not?
> Fix this by not adding PXB mem/IO chunks to _CRS
> if they weren't configured by BIOS.
>
> Signed-off-by: Marcel Apfelbaum <mar...@redhat.com>
> ---
> hw/i386/acpi-build.c | 87
> ++++++++++++++++++++++++++++++++++------------------
> 1 file changed, 58 insertions(+), 29 deletions(-)
>
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index f7d2c80..895d64c 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -784,6 +784,14 @@ static Aml *build_crs(PCIHostState *host,
> range_base = r->addr;
> range_limit = r->addr + r->size - 1;
>
> + /*
> + * Work-around for old bioses
> + * that do not support multiple root buses
> + */
> + if (!range_base || range_base > range_limit) {
> + continue;
> + }
> +
> if (r->type & PCI_BASE_ADDRESS_SPACE_IO) {
> aml_append(crs,
> aml_word_io(aml_min_fixed, aml_max_fixed,
> @@ -817,45 +825,66 @@ static Aml *build_crs(PCIHostState *host,
>
> range_base = pci_bridge_get_base(dev, PCI_BASE_ADDRESS_SPACE_IO);
> range_limit = pci_bridge_get_limit(dev,
> PCI_BASE_ADDRESS_SPACE_IO);
> - aml_append(crs,
> - aml_word_io(aml_min_fixed, aml_max_fixed,
> - aml_pos_decode, aml_entire_range,
> - 0,
> - range_base,
> - range_limit,
> - 0,
> - range_limit - range_base + 1));
> - crs_range_insert(io_ranges, range_base, range_limit);
> +
> + /*
> + * Work-around for old bioses
> + * that do not support multiple root buses
> + */
> + if (range_base || range_base > range_limit) {
> + aml_append(crs,
> + aml_word_io(aml_min_fixed, aml_max_fixed,
> + aml_pos_decode, aml_entire_range,
> + 0,
> + range_base,
> + range_limit,
> + 0,
> + range_limit - range_base + 1));
> + crs_range_insert(io_ranges, range_base, range_limit);
> + }
>
> range_base =
> pci_bridge_get_base(dev, PCI_BASE_ADDRESS_SPACE_MEMORY);
> range_limit =
> pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_SPACE_MEMORY);
> - aml_append(crs,
> - aml_dword_memory(aml_pos_decode, aml_min_fixed,
> - aml_max_fixed, aml_non_cacheable,
> - aml_ReadWrite,
> - 0,
> - range_base,
> - range_limit,
> - 0,
> - range_limit - range_base + 1));
> - crs_range_insert(mem_ranges, range_base, range_limit);
> +
> + /*
> + * Work-around for old bioses
> + * that do not support multiple root buses
> + */
> + if (range_base || range_base > range_limit) {
> + aml_append(crs,
> + aml_dword_memory(aml_pos_decode, aml_min_fixed,
> + aml_max_fixed, aml_non_cacheable,
> + aml_ReadWrite,
> + 0,
> + range_base,
> + range_limit,
> + 0,
> + range_limit - range_base + 1));
> + crs_range_insert(mem_ranges, range_base, range_limit);
> + }
>
> range_base =
> pci_bridge_get_base(dev, PCI_BASE_ADDRESS_MEM_PREFETCH);
> range_limit =
> pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_MEM_PREFETCH);
> - aml_append(crs,
> - aml_dword_memory(aml_pos_decode, aml_min_fixed,
> - aml_max_fixed, aml_non_cacheable,
> - aml_ReadWrite,
> - 0,
> - range_base,
> - range_limit,
> - 0,
> - range_limit - range_base + 1));
> - crs_range_insert(mem_ranges, range_base, range_limit);
> +
> + /*
> + * Work-around for old bioses
> + * that do not support multiple root buses
> + */
> + if (range_base || range_base > range_limit) {
> + aml_append(crs,
> + aml_dword_memory(aml_pos_decode, aml_min_fixed,
> + aml_max_fixed, aml_non_cacheable,
> + aml_ReadWrite,
> + 0,
> + range_base,
> + range_limit,
> + 0,
> + range_limit - range_base + 1));
> + crs_range_insert(mem_ranges, range_base, range_limit);
> + }
> }
> }
>
> --
> 2.1.0
>
