On 26 May 2015 at 17:49, Yongbok Kim <yongbok....@imgtec.com> wrote:
> Add probe_write() forces a tlb_fill if the specified guest virtual
> index isn't in the TCG softmmu TLB.
Surely the point is not to fill the TLB but to raise an
exception if the address is not writable?
> +#if DATA_SIZE == 1
> +/*
> + * Force a tlb_fill if the specified guest virtual index isn't in the TCG
> + * softmmu TLB.
> + */
> +void probe_write(CPUArchState *env, target_ulong addr, int mmu_idx,
> + uintptr_t retaddr)
> +{
> + int index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
> + target_ulong tlb_addr = env->tlb_table[mmu_idx][index].addr_write;
> +
> + if ((addr & TARGET_PAGE_MASK)
> + != (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
> + /* TLB entry is for a different page */
> + if (!VICTIM_TLB_HIT(addr_write)) {
> + tlb_fill(ENV_GET_CPU(env), addr, MMU_DATA_STORE, mmu_idx,
> retaddr);
> + }
> + }
> +}
> +#endif
> #endif /* !defined(SOFTMMU_CODE_ACCESS) */
I think this code does what you want, but the comments are
rather misleading...
-- PMM
