On Thu, May 7, 2015 at 7:02 AM, Peter Maydell <peter.mayd...@linaro.org> wrote:
> On 6 May 2015 at 23:50, Peter Crosthwaite <peter.crosthwa...@xilinx.com>
> wrote:
>> Add the GIC and connect IRQ outputs to the CPUs. The GIC regions are
>> under-decoded through a 64k address region so implement aliases
>> accordingly.
>
>> + assert(ARRAY_SIZE(xlnx_zynqmp_gic_regions) == XLNX_ZYNQMP_GIC_REGIONS);
>> + for (i = 0; i < XLNX_ZYNQMP_GIC_REGIONS; i++) {
>> + SysBusDevice *gic = SYS_BUS_DEVICE(&s->gic);
>> + const XlnxZynqMPGICRegion *r = &xlnx_zynqmp_gic_regions[i];
>> + MemoryRegion *mr = sysbus_mmio_get_region(gic, r->region_index);
>> + uint32_t addr = r->address;
>> + int j;
>> +
>> + sysbus_mmio_map(gic, r->region_index, addr);
>> +
>> + for (j = 0; j < XLNX_ZYNQMP_GIC_ALIASES; j++) {
>> + MemoryRegion *alias = &s->gic_mr[i][j];
>> +
>> + addr += ARM_GIC_REGION_SIZE;
>
> Since the frequency at which the GICC region repeats in the memory
> map is actually board dependent, you could just use a board
> specific constant here.
>
>> + memory_region_init_alias(alias, OBJECT(s), "zynqmp-gic-alias",
>> mr,
>> + 0, ARM_GIC_REGION_SIZE);
>
> ...and here you could use memory_region_size(mr), I suppose,
> or just the board-specific value again.
>
Used board-specific define in both instances (as well as the one in the header).
Regards,
Peter
> -- PMM
>
