On Tue, 5 May 2015 14:23:52 +0530
Nikunj A Dadhania <nik...@linux.vnet.ibm.com> wrote:
> The properties reg/assigned-resources need to encode 64-bit memory
> address space as part of phys.hi dword.
>
> 00 if configuration space
> 01 if IO region,
> 10 if 32-bit MEM region
> 11 if 64-bit MEM region
>
> Signed-off-by: Nikunj A Dadhania <nik...@linux.vnet.ibm.com>
> ---
> hw/ppc/spapr_pci.c | 10 +++++++++-
> 1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
> index 4df3a33..ea1a092 100644
> --- a/hw/ppc/spapr_pci.c
> +++ b/hw/ppc/spapr_pci.c
> @@ -786,7 +786,13 @@ typedef struct ResourceProps {
> * phys.hi = 0xYYXXXXZZ, where:
> * 0xYY = npt000ss
> * ||| |
> - * ||| +-- space code: 1 if IO region, 2 if MEM region
> + * ||| +-- space code
> + * ||| |
> + * ||| + 00 if configuration space
> + * ||| + 01 if IO region,
> + * ||| + 10 if 32-bit MEM region
> + * ||| + 11 if 64-bit MEM region
> + * |||
> * ||+------ for non-relocatable IO: 1 if aliased
> * || for relocatable IO: 1 if below 64KB
> * || for MEM: 1 if below 1MB
> @@ -846,6 +852,8 @@ static void populate_resource_props(PCIDevice *d,
> ResourceProps *rp)
> reg->phys_hi = cpu_to_be32(dev_id | b_rrrrrrrr(pci_bar(d, i)));
> if (d->io_regions[i].type & PCI_BASE_ADDRESS_SPACE_IO) {
> reg->phys_hi |= cpu_to_be32(b_ss(1));
> + } else if (d->io_regions[i].type & PCI_BASE_ADDRESS_MEM_TYPE_64) {
> + reg->phys_hi |= cpu_to_be32(b_ss(3));
> } else {
> reg->phys_hi |= cpu_to_be32(b_ss(2));
> }
Reviewed-by: Thomas Huth <th...@redhat.com>
BTW, does this also require the new version of SLOF already?
