On 05/04/2015 12:16 PM, Kevin O'Connor wrote:
On Mon, May 04, 2015 at 11:22:25AM -0400, Stefan Berger wrote:
On 05/04/2015 05:16 AM, Igor Mammedov wrote:
On Wed, 29 Apr 2015 12:42:21 -0400
2 choices now -- which one to take?
I'd try installing extra SSDT table first as a cleanest way (seabios only)
and if it fails fallback to TIS path.
I did some experiment where I tried to use AML's Store() call to see whether
it can read from some entry in another scope, similar to what the specs show
on page 487, so that one could read the base address that is written
elsewhere. The problem seems to be that there is no actual searching going
on for accessing a scope during runtime, but this seems to be done during
compile time. So something like Store(\_SB.I2C1.Y, BUFF) from the specs
needs to have a SCOPE(\_SB.I2C1...) available during compile time.
You can reference scopes provided by other SSDTs/DSDT using the
"External()" acpi command.
Tried it. Works with the \DBUG function for example.
As an example, External(\BASE) would give allow us to get the base address.
The AML code for BASE, something like this
Scope(\) {
Name(BASE, 0x12345678)
}
Access to it would be like this:
Store(\BASE, Local0)
The above first snippet would have to be compiled by SeaBIOS. 0x12345678
would in this case be the address allocated by SeaBIOS where the AML
code for PPI could read/write the PPID data to/from. Kevin and I had an
offline conversation about this and Kevin doesn't seem to like the idea
of a split implementation of ACPI table generation. I would then extend
the TIS with a couple of bytes that retain the data across a reset.
Stefan
