On Fri, 24 Apr 2015 12:17:28 +0530
Bharata B Rao <bhar...@linux.vnet.ibm.com> wrote:
> Factor out bits of sPAPR specific CPU initialization code into
> a separate routine so that it can be called from CPU hotplug
> path too.
>
> Signed-off-by: Bharata B Rao <bhar...@linux.vnet.ibm.com>
> Reviewed-by: David Gibson <da...@gibson.dropbear.id.au>
> ---
> hw/ppc/spapr.c | 54 +++++++++++++++++++++++++++++-------------------------
> 1 file changed, 29 insertions(+), 25 deletions(-)
>
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index a56f9a1..5c8f2ff 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -1440,6 +1440,34 @@ static void spapr_drc_reset(void *opaque)
> }
> }
>
> +static void spapr_cpu_init(PowerPCCPU *cpu)
> +{
> + CPUPPCState *env = &cpu->env;
> +
> + /* Set time-base frequency to 512 MHz */
> + cpu_ppc_tb_init(env, TIMEBASE_FREQ);
> +
> + /* PAPR always has exception vectors in RAM not ROM. To ensure this,
> + * MSR[IP] should never be set.
> + */
> + env->msr_mask &= ~(1 << 6);
While you're at it ... could we maybe get a proper #define for that MSR
bit? (just like the other ones in target-ppc/cpu.h)
> + /* Tell KVM that we're in PAPR mode */
> + if (kvm_enabled()) {
> + kvmppc_set_papr(cpu);
> + }
> +
> + if (cpu->max_compat) {
> + if (ppc_set_compat(cpu, cpu->max_compat) < 0) {
> + exit(1);
> + }
> + }
> +
> + xics_cpu_setup(spapr->icp, cpu);
> +
> + qemu_register_reset(spapr_cpu_reset, cpu);
> +}
Thomas
