Chen, Tiejun wrote
> +/* Here we just expose minimal host bridge offset subset. */
> +static const IGDHostInfo igd_host_bridge_infos[] = {
> + {0x08, 2}, /* revision id */
> + {0x2c, 2}, /* sybsystem vendor id */
> + {0x2e, 2}, /* sybsystem id */
> + {0x50, 2}, /* SNB: processor graphics control register */
> + {0x52, 2}, /* processor graphics control register */
> + {0xa4, 4}, /* SNB: graphics base of stolen memory */
> + {0xa8, 4}, /* SNB: base of GTT stolen memory */
> +};
> +
I tested this patch and found that the registers 0xa0(top of memory) and
0xb0(ILK: BSM) were necessary for Win XP. Both of them are 4 bytes.
Chen, Tiejun wrote
> +static int igd_pt_i440fx_initfn(struct PCIDevice *pci_dev)
> +{
> + uint32_t val = 0;
> + int rc, i, num;
> + int pos, len;
> +
> + num = ARRAY_SIZE(igd_host_bridge_infos);
> + for (i = 0; i < num; i++) {
> + pos = igd_host_bridge_infos[i].offset;
> + len = igd_host_bridge_infos[i].len;
> + rc = host_pci_config_read(pos, len, val);
Here, when we call function host_pci_config_read, the parameter val is
passed by value not address, so the value of val will not be changed after
call host_pci_config_read. So I think host_pci_config_read need update and
the third parameter should be an address.
Thanks
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