Public bug reported:
http://cache.freescale.com/files/32bit/doc/ref_manual/E500CORERM.pdf - see
2.12.5.2 MAS Register 1 (MAS1), p. 2-41
http://cache.freescale.com/files/32bit/doc/ref_manual/E500MCRM.pdf - see
2.16.6.2 MAS Register 1 (MAS1), p. 2-54
According to these documents, variable page size for TLB1 is computed as
4K ** TSIZE.
However, QEMU always treats it as if it was 1K << TSIZE, even if options
like "-cpu e500mc" are supplied to qemu.
** Affects: qemu
Importance: Undecided
Status: New
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https://bugs.launchpad.net/bugs/1438144
Title:
Page sizes are not interpreted correctly for E500/E500MC
Status in QEMU:
New
Bug description:
http://cache.freescale.com/files/32bit/doc/ref_manual/E500CORERM.pdf - see
2.12.5.2 MAS Register 1 (MAS1), p. 2-41
http://cache.freescale.com/files/32bit/doc/ref_manual/E500MCRM.pdf - see
2.16.6.2 MAS Register 1 (MAS1), p. 2-54
According to these documents, variable page size for TLB1 is computed
as 4K ** TSIZE.
However, QEMU always treats it as if it was 1K << TSIZE, even if
options like "-cpu e500mc" are supplied to qemu.
To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1438144/+subscriptions
