On Tue, Mar 10, 2015 at 09:49:49AM +0800, Chen Fan wrote: > >From pcie spec, the bits attributes are RW1CS in Correctable > Error Status Register, so this patch fix a wrong definition > for PCI_ERR_COR_STATUS register with w1cmask type. > > Signed-off-by: Chen Fan <chen.fan.f...@cn.fujitsu.com>
Reviewed-by: Michael S. Tsirkin <m...@redhat.com> > --- > hw/pci/pcie_aer.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c > index 7ca077a..ece1487 100644 > --- a/hw/pci/pcie_aer.c > +++ b/hw/pci/pcie_aer.c > @@ -123,7 +123,7 @@ int pcie_aer_init(PCIDevice *dev, uint16_t offset) > PCI_ERR_UNC_SUPPORTED); > > pci_long_test_and_set_mask(dev->w1cmask + offset + PCI_ERR_COR_STATUS, > - PCI_ERR_COR_STATUS); > + PCI_ERR_COR_SUPPORTED); > > pci_set_long(dev->config + offset + PCI_ERR_COR_MASK, > PCI_ERR_COR_MASK_DEFAULT); > -- > 1.9.3