On 23 January 2015 at 20:16, Greg Bellows <greg.bell...@linaro.org> wrote: > On Fri, Jan 23, 2015 at 12:20 PM, Peter Maydell > <peter.mayd...@linaro.org> wrote: >> Support guest CPUs which need 7 MMU index values. >> Add a comment about what would be required to raise the limit >> further (trivial for 8, TCG backend rework for 9 or more). >> >> Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> >> --- >> include/exec/cpu_ldst.h | 28 +++++++++++++++++++++++++--- >> 1 file changed, 25 insertions(+), 3 deletions(-) >> >> diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h >> index 0e825ea..fa5ea63 100644 >> --- a/include/exec/cpu_ldst.h >> +++ b/include/exec/cpu_ldst.h >> @@ -244,9 +244,31 @@ uint64_t helper_ldq_cmmu(CPUArchState *env, >> target_ulong addr, int mmu_idx); >> #undef MEMSUFFIX >> #endif /* (NB_MMU_MODES >= 6) */ >> >> -#if (NB_MMU_MODES > 6) >> -#error "NB_MMU_MODES > 6 is not supported for now" >> -#endif /* (NB_MMU_MODES > 6) */ >> +#if (NB_MMU_MODES >= 7) && defined(MMU_MODE6_SUFFIX) >> + >> +#define CPU_MMU_INDEX 6 >> +#define MEMSUFFIX MMU_MODE5_SUFFIX > > Should this be MMU_MODE6_SUFFIX?
Yes, good catch (we don't notice since we don't define the MMU_MODE*_SUFFIX anyway). -- PMM
