The SSDT size is different from the first time is created and
the second time because between them the BIOS sets ranges for
the other PCI root busses.
The OS-es cannot find the rsdt pointer after that, until this
problem is solved, this hack can be used for testing.
Signed-off-by: Marcel Apfelbaum <mar...@redhat.com>
---
hw/i386/acpi-build.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index d490a1e..c7ab178 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -794,6 +794,9 @@ static AcpiAml build_crs(PcPciInfo *pci, PciInfo *bus_info,
bridge_info->bus.io_range->limit -
bridge_info->bus.io_range->base + 1));
range = *bridge_info->bus.io_range;
+ if (!range.base) {
+ range.base = 0x0D00 + bus_info->bus * 0x100;
+ }
pci_mem_range_insert(io_ranges, range);
aml_append(&crs,
@@ -806,6 +809,9 @@ static AcpiAml build_crs(PcPciInfo *pci, PciInfo *bus_info,
bridge_info->bus.memory_range->limit -
bridge_info->bus.memory_range->base + 1));
range = *bridge_info->bus.memory_range;
+ if (!range.base) {
+ range.base = pci->w32.begin + bus_info->bus * 0x1000;
+ }
pci_mem_range_insert(mem_ranges, range);
aml_append(&crs,
acpi_dword_memory(acpi_pos_decode, acpi_min_fixed,
@@ -817,6 +823,9 @@ static AcpiAml build_crs(PcPciInfo *pci, PciInfo *bus_info,
bridge_info->bus.prefetchable_range->limit -
bridge_info->bus.prefetchable_range->base + 1));
range = *bridge_info->bus.prefetchable_range;
+ if (!range.base) {
+ range.base = pci->w32.begin + bus_info->bus * 0x2000;
+ }
pci_mem_range_insert(mem_ranges, range);
}
--
2.1.0
