This for now is a simple TLB flush. This can change later for two reasons:
1) an AddressSpaceDispatch will be cached in the CPUState object 2) it will not be possible to do tlb_flush once the TCG-generated code runs outside the BQL. Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> --- cpu-exec.c | 6 ++++++ exec.c | 2 +- include/exec/exec-all.h | 1 + 3 files changed, 8 insertions(+), 1 deletion(-) diff --git a/cpu-exec.c b/cpu-exec.c index a4f0eff..5a9e23f 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -144,6 +144,12 @@ void cpu_resume_from_signal(CPUState *cpu, void *puc) cpu->exception_index = -1; siglongjmp(cpu->jmp_env, 1); } + +void cpu_reload_memory_map(CPUState *cpu) +{ + /* The TLB is protected by the iothread lock. */ + tlb_flush(cpu, 1); +} #endif /* Execute a TB, and fix up the CPU state afterwards if necessary */ diff --git a/exec.c b/exec.c index 410371d..d79a1bc 100644 --- a/exec.c +++ b/exec.c @@ -2025,7 +2025,7 @@ static void tcg_commit(MemoryListener *listener) if (cpu->tcg_as_listener != listener) { continue; } - tlb_flush(cpu, 1); + cpu_reload_memory_map(cpu); } } diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 6a15448..1b30813 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -96,6 +96,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end, void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end, int is_cpu_write_access); #if !defined(CONFIG_USER_ONLY) +void cpu_reload_memory_map(CPUState *cpu); void tcg_cpu_address_space_init(CPUState *cpu, AddressSpace *as); /* cputlb.c */ void tlb_flush_page(CPUState *cpu, target_ulong addr); -- 1.8.3.1