Quoting Michael Roth (2014-12-23 13:33:35) > This patch enables the programming of address 0 for IO/MMIO BARs for > PCI devices. > > It was originally included as part of a series implementing PCI > hotplug for pseries guests, where it is needed due to the fact > that pseries guests access IO space via MMIO, and that IO > space is dedicated to PCI devices, with RTAS calls being used in > place of common/legacy IO ports such as config-data/config-address. > > Thus, the entire range is unhindered by legacy IO ports, and > pseries guest kernels may attempt to program an IO BAR to address 0 > as a result. > > This has led to a conflict with the existing PCI config space > emulation code, where it has been assumed that 0 address are always > invalid. > > Some background from discussions can be viewed here: > > https://lists.nongnu.org/archive/html/qemu-devel/2014-08/msg03063.html > > The general summary from that discussion seems to be that 0-addresses are > not (at least, are no longer) prohibited by current versions of the PCI > spec, and that the same should apply for MMIO addresses (where allowing > 0-addresses are also needed for some ARM-based PCI controllers). > > This patch includes support for 0-address MMIO BARs based on that > discussion. > > One still-lingering concern is whether this change will impact > compatibility with guests where 0-addresses are invalid. There was > some discussion on whether this issue could be addressed using > memory region priorities, but I think that's still an open question > that we can hopefully address here.
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