Mechanically replace `*_default_nan' variables with inline functions and
convert references accordingly. Use `__inline__' rather than `inline'
so that the latter does not cause the definitions to become static as a
result of macro expansion, the functions are best inlined when referred
to from softfloat.c, but external copies must be also produced for
external callers.
Signed-off-by: Thomas Schwinge <tho...@codesourcery.com>
Signed-off-by: Maciej W. Rozycki <ma...@codesourcery.com>
---
Eventually we might want to move the new inline functions into a
separate header to be included from softfloat.h instead of softfloat.c,
but let's make changes one step at a time.
So for the time being -- please apply.
qemu-softfloat-default-nan-func.diff
Index: qemu-git-trunk/fpu/softfloat-specialize.h
===================================================================
--- qemu-git-trunk.orig/fpu/softfloat-specialize.h 2014-12-02
00:13:12.808049315 +0000
+++ qemu-git-trunk/fpu/softfloat-specialize.h 2014-12-02 00:13:14.309029586
+0000
@@ -51,69 +51,74 @@ these four paragraphs for those parts of
/*----------------------------------------------------------------------------
| The pattern for a default generated half-precision NaN.
*----------------------------------------------------------------------------*/
+inline float16 float16_default_nan(void)
+{
#if defined(TARGET_ARM)
-const float16 float16_default_nan = const_float16(0x7E00);
+ return const_float16(0x7E00);
#elif SNAN_BIT_IS_ONE
-const float16 float16_default_nan = const_float16(0x7DFF);
+ return const_float16(0x7DFF);
#else
-const float16 float16_default_nan = const_float16(0xFE00);
+ return const_float16(0xFE00);
#endif
+}
/*----------------------------------------------------------------------------
| The pattern for a default generated single-precision NaN.
*----------------------------------------------------------------------------*/
+inline float32 float32_default_nan(void)
+{
#if defined(TARGET_SPARC)
-const float32 float32_default_nan = const_float32(0x7FFFFFFF);
+ return const_float32(0x7FFFFFFF);
#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
defined(TARGET_XTENSA)
-const float32 float32_default_nan = const_float32(0x7FC00000);
+ return const_float32(0x7FC00000);
#elif SNAN_BIT_IS_ONE
-const float32 float32_default_nan = const_float32(0x7FBFFFFF);
+ return const_float32(0x7FBFFFFF);
#else
-const float32 float32_default_nan = const_float32(0xFFC00000);
+ return const_float32(0xFFC00000);
#endif
+}
/*----------------------------------------------------------------------------
| The pattern for a default generated double-precision NaN.
*----------------------------------------------------------------------------*/
+inline float64 float64_default_nan(void)
+{
#if defined(TARGET_SPARC)
-const float64 float64_default_nan = const_float64(LIT64( 0x7FFFFFFFFFFFFFFF ));
+ return const_float64(LIT64(0x7FFFFFFFFFFFFFFF));
#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA)
-const float64 float64_default_nan = const_float64(LIT64( 0x7FF8000000000000 ));
+ return const_float64(LIT64(0x7FF8000000000000));
#elif SNAN_BIT_IS_ONE
-const float64 float64_default_nan = const_float64(LIT64( 0x7FF7FFFFFFFFFFFF ));
+ return const_float64(LIT64(0x7FF7FFFFFFFFFFFF));
#else
-const float64 float64_default_nan = const_float64(LIT64( 0xFFF8000000000000 ));
+ return const_float64(LIT64(0xFFF8000000000000));
#endif
+}
/*----------------------------------------------------------------------------
| The pattern for a default generated extended double-precision NaN.
*----------------------------------------------------------------------------*/
+inline floatx80 floatx80_default_nan(void)
+{
#if SNAN_BIT_IS_ONE
-#define floatx80_default_nan_high 0x7FFF
-#define floatx80_default_nan_low LIT64( 0xBFFFFFFFFFFFFFFF )
+ return make_floatx80(0x7FFF, LIT64(0xBFFFFFFFFFFFFFFF));
#else
-#define floatx80_default_nan_high 0xFFFF
-#define floatx80_default_nan_low LIT64( 0xC000000000000000 )
+ return make_floatx80(0xFFFF, LIT64(0xC000000000000000));
#endif
-
-const floatx80 floatx80_default_nan
- = make_floatx80_init(floatx80_default_nan_high, floatx80_default_nan_low);
+}
/*----------------------------------------------------------------------------
| The pattern for a default generated quadruple-precision NaN. The `high' and
| `low' values hold the most- and least-significant bits, respectively.
*----------------------------------------------------------------------------*/
+inline float128 float128_default_nan(void)
+{
#if SNAN_BIT_IS_ONE
-#define float128_default_nan_high LIT64( 0x7FFF7FFFFFFFFFFF )
-#define float128_default_nan_low LIT64( 0xFFFFFFFFFFFFFFFF )
+ return make_float128(LIT64(0x7FFF7FFFFFFFFFFF), LIT64(0xFFFFFFFFFFFFFFFF));
#else
-#define float128_default_nan_high LIT64( 0xFFFF800000000000 )
-#define float128_default_nan_low LIT64( 0x0000000000000000 )
+ return make_float128(LIT64(0xFFFF800000000000), LIT64(0x0000000000000000));
#endif
-
-const float128 float128_default_nan
- = make_float128_init(float128_default_nan_high, float128_default_nan_low);
+}
/*----------------------------------------------------------------------------
| Raises the exceptions specified by `flags'. Floating-point traps can be
@@ -186,7 +191,7 @@ float16 float16_maybe_silence_nan(float1
if (float16_is_signaling_nan(a_)) {
#if SNAN_BIT_IS_ONE
# if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
- return float16_default_nan;
+ return float16_default_nan();
# else
# error Rules for silencing a signaling NaN are target-specific
# endif
@@ -226,14 +231,14 @@ static float16 commonNaNToFloat16(common
uint16_t mantissa = a.high>>54;
if (STATUS(default_nan_mode)) {
- return float16_default_nan;
+ return float16_default_nan();
}
if (mantissa) {
return make_float16(((((uint16_t) a.sign) << 15)
| (0x1F << 10) | mantissa));
} else {
- return float16_default_nan;
+ return float16_default_nan();
}
}
@@ -289,7 +294,7 @@ float32 float32_maybe_silence_nan( float
if (float32_is_signaling_nan(a_)) {
#if SNAN_BIT_IS_ONE
# if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
- return float32_default_nan;
+ return float32_default_nan();
# else
# error Rules for silencing a signaling NaN are target-specific
# endif
@@ -329,14 +334,14 @@ static float32 commonNaNToFloat32( commo
uint32_t mantissa = a.high>>41;
if ( STATUS(default_nan_mode) ) {
- return float32_default_nan;
+ return float32_default_nan();
}
if ( mantissa )
return make_float32(
( ( (uint32_t) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) );
else
- return float32_default_nan;
+ return float32_default_nan();
}
/*----------------------------------------------------------------------------
@@ -576,7 +581,7 @@ static float32 propagateFloat32NaN( floa
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid
STATUS_VAR);
if ( STATUS(default_nan_mode) )
- return float32_default_nan;
+ return float32_default_nan();
if ((uint32_t)(av<<1) < (uint32_t)(bv<<1)) {
aIsLargerSignificand = 0;
@@ -629,7 +634,7 @@ static float32 propagateFloat32MulAddNaN
/* Note that this check is after pickNaNMulAdd so that function
* has an opportunity to set the Invalid flag.
*/
- return float32_default_nan;
+ return float32_default_nan();
}
switch (which) {
@@ -641,7 +646,7 @@ static float32 propagateFloat32MulAddNaN
return float32_maybe_silence_nan(c);
case 3:
default:
- return float32_default_nan;
+ return float32_default_nan();
}
}
@@ -701,7 +706,7 @@ float64 float64_maybe_silence_nan( float
if (float64_is_signaling_nan(a_)) {
#if SNAN_BIT_IS_ONE
# if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
- return float64_default_nan;
+ return float64_default_nan();
# else
# error Rules for silencing a signaling NaN are target-specific
# endif
@@ -741,7 +746,7 @@ static float64 commonNaNToFloat64( commo
uint64_t mantissa = a.high>>12;
if ( STATUS(default_nan_mode) ) {
- return float64_default_nan;
+ return float64_default_nan();
}
if ( mantissa )
@@ -750,7 +755,7 @@ static float64 commonNaNToFloat64( commo
| LIT64( 0x7FF0000000000000 )
| ( a.high>>12 ));
else
- return float64_default_nan;
+ return float64_default_nan();
}
/*----------------------------------------------------------------------------
@@ -775,7 +780,7 @@ static float64 propagateFloat64NaN( floa
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid
STATUS_VAR);
if ( STATUS(default_nan_mode) )
- return float64_default_nan;
+ return float64_default_nan();
if ((uint64_t)(av<<1) < (uint64_t)(bv<<1)) {
aIsLargerSignificand = 0;
@@ -828,7 +833,7 @@ static float64 propagateFloat64MulAddNaN
/* Note that this check is after pickNaNMulAdd so that function
* has an opportunity to set the Invalid flag.
*/
- return float64_default_nan;
+ return float64_default_nan();
}
switch (which) {
@@ -840,7 +845,7 @@ static float64 propagateFloat64MulAddNaN
return float64_maybe_silence_nan(c);
case 3:
default:
- return float64_default_nan;
+ return float64_default_nan();
}
}
@@ -910,8 +915,7 @@ floatx80 floatx80_maybe_silence_nan( flo
if (floatx80_is_signaling_nan(a)) {
#if SNAN_BIT_IS_ONE
# if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
- a.low = floatx80_default_nan_low;
- a.high = floatx80_default_nan_high;
+ a = floatx80_default_nan();
# else
# error Rules for silencing a signaling NaN are target-specific
# endif
@@ -936,8 +940,7 @@ static commonNaNT floatx80ToCommonNaN( f
if ( floatx80_is_signaling_nan( a ) ) float_raise( float_flag_invalid
STATUS_VAR);
/* Replace a Pseudo NaN with a default NaN. */
if (!(a.low >> 63)) {
- a.low = floatx80_default_nan_low;
- a.high = floatx80_default_nan_high;
+ a = floatx80_default_nan();
}
z.sign = a.high >> 15;
z.low = 0;
@@ -955,17 +958,14 @@ static floatx80 commonNaNToFloatx80( com
floatx80 z;
if ( STATUS(default_nan_mode) ) {
- z.low = floatx80_default_nan_low;
- z.high = floatx80_default_nan_high;
- return z;
+ return floatx80_default_nan();
}
if (a.high >> 1) {
z.low = LIT64( 0x8000000000000000 ) | a.high >> 1;
z.high = ( ( (uint16_t) a.sign )<<15 ) | 0x7FFF;
} else {
- z.low = floatx80_default_nan_low;
- z.high = floatx80_default_nan_high;
+ z = floatx80_default_nan();
}
return z;
@@ -990,9 +990,7 @@ static floatx80 propagateFloatx80NaN( fl
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid
STATUS_VAR);
if ( STATUS(default_nan_mode) ) {
- a.low = floatx80_default_nan_low;
- a.high = floatx80_default_nan_high;
- return a;
+ return floatx80_default_nan();
}
if (a.low < b.low) {
@@ -1069,8 +1067,7 @@ float128 float128_maybe_silence_nan( flo
if (float128_is_signaling_nan(a)) {
#if SNAN_BIT_IS_ONE
# if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
- a.low = float128_default_nan_low;
- a.high = float128_default_nan_high;
+ a = float128_default_nan();
# else
# error Rules for silencing a signaling NaN are target-specific
# endif
@@ -1108,9 +1105,7 @@ static float128 commonNaNToFloat128( com
float128 z;
if ( STATUS(default_nan_mode) ) {
- z.low = float128_default_nan_low;
- z.high = float128_default_nan_high;
- return z;
+ return float128_default_nan();
}
shift128Right( a.high, a.low, 16, &z.high, &z.low );
@@ -1137,9 +1132,7 @@ static float128 propagateFloat128NaN( fl
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid
STATUS_VAR);
if ( STATUS(default_nan_mode) ) {
- a.low = float128_default_nan_low;
- a.high = float128_default_nan_high;
- return a;
+ return float128_default_nan();
}
if (lt128(a.high<<1, a.low, b.high<<1, b.low)) {
Index: qemu-git-trunk/fpu/softfloat.c
===================================================================
--- qemu-git-trunk.orig/fpu/softfloat.c 2014-12-02 00:13:11.308044826 +0000
+++ qemu-git-trunk/fpu/softfloat.c 2014-12-02 00:13:14.309029586 +0000
@@ -1979,7 +1979,7 @@ static float32 subFloat32Sigs( float32 a
if ( aExp == 0xFF ) {
if ( aSig | bSig ) return propagateFloat32NaN( a, b STATUS_VAR );
float_raise( float_flag_invalid STATUS_VAR);
- return float32_default_nan;
+ return float32_default_nan();
}
if ( aExp == 0 ) {
aExp = 1;
@@ -2104,7 +2104,7 @@ float32 float32_mul( float32 a, float32
}
if ( ( bExp | bSig ) == 0 ) {
float_raise( float_flag_invalid STATUS_VAR);
- return float32_default_nan;
+ return float32_default_nan();
}
return packFloat32( zSign, 0xFF, 0 );
}
@@ -2112,7 +2112,7 @@ float32 float32_mul( float32 a, float32
if ( bSig ) return propagateFloat32NaN( a, b STATUS_VAR );
if ( ( aExp | aSig ) == 0 ) {
float_raise( float_flag_invalid STATUS_VAR);
- return float32_default_nan;
+ return float32_default_nan();
}
return packFloat32( zSign, 0xFF, 0 );
}
@@ -2163,7 +2163,7 @@ float32 float32_div( float32 a, float32
if ( bExp == 0xFF ) {
if ( bSig ) return propagateFloat32NaN( a, b STATUS_VAR );
float_raise( float_flag_invalid STATUS_VAR);
- return float32_default_nan;
+ return float32_default_nan();
}
return packFloat32( zSign, 0xFF, 0 );
}
@@ -2175,7 +2175,7 @@ float32 float32_div( float32 a, float32
if ( bSig == 0 ) {
if ( ( aExp | aSig ) == 0 ) {
float_raise( float_flag_invalid STATUS_VAR);
- return float32_default_nan;
+ return float32_default_nan();
}
float_raise( float_flag_divbyzero STATUS_VAR);
return packFloat32( zSign, 0xFF, 0 );
@@ -2229,7 +2229,7 @@ float32 float32_rem( float32 a, float32
return propagateFloat32NaN( a, b STATUS_VAR );
}
float_raise( float_flag_invalid STATUS_VAR);
- return float32_default_nan;
+ return float32_default_nan();
}
if ( bExp == 0xFF ) {
if ( bSig ) return propagateFloat32NaN( a, b STATUS_VAR );
@@ -2238,7 +2238,7 @@ float32 float32_rem( float32 a, float32
if ( bExp == 0 ) {
if ( bSig == 0 ) {
float_raise( float_flag_invalid STATUS_VAR);
- return float32_default_nan;
+ return float32_default_nan();
}
normalizeFloat32Subnormal( bSig, &bExp, &bSig );
}
@@ -2353,7 +2353,7 @@ float32 float32_muladd(float32 a, float3
if (infzero) {
float_raise(float_flag_invalid STATUS_VAR);
- return float32_default_nan;
+ return float32_default_nan();
}
if (flags & float_muladd_negate_c) {
@@ -2374,7 +2374,7 @@ float32 float32_muladd(float32 a, float3
if (pInf && (pSign ^ cSign)) {
/* addition of opposite-signed infinities => InvalidOperation */
float_raise(float_flag_invalid STATUS_VAR);
- return float32_default_nan;
+ return float32_default_nan();
}
/* Otherwise generate an infinity of the same sign */
return packFloat32(cSign ^ signflip, 0xff, 0);
@@ -2548,12 +2548,12 @@ float32 float32_sqrt( float32 a STATUS_P
if ( aSig ) return propagateFloat32NaN( a, float32_zero STATUS_VAR );
if ( ! aSign ) return a;
float_raise( float_flag_invalid STATUS_VAR);
- return float32_default_nan;
+ return float32_default_nan();
}
if ( aSign ) {
if ( ( aExp | aSig ) == 0 ) return a;
float_raise( float_flag_invalid STATUS_VAR);
- return float32_default_nan;
+ return float32_default_nan();
}
if ( aExp == 0 ) {
if ( aSig == 0 ) return float32_zero;
@@ -2684,7 +2684,7 @@ float32 float32_log2( float32 a STATUS_P
}
if ( aSign ) {
float_raise( float_flag_invalid STATUS_VAR);
- return float32_default_nan;
+ return float32_default_nan();
}
if ( aExp == 0xFF ) {
if ( aSig ) return propagateFloat32NaN( a, float32_zero STATUS_VAR );
@@ -3740,7 +3740,7 @@ static float64 subFloat64Sigs( float64 a
if ( aExp == 0x7FF ) {
if ( aSig | bSig ) return propagateFloat64NaN( a, b STATUS_VAR );
float_raise( float_flag_invalid STATUS_VAR);
- return float64_default_nan;
+ return float64_default_nan();
}
if ( aExp == 0 ) {
aExp = 1;
@@ -3863,7 +3863,7 @@ float64 float64_mul( float64 a, float64
}
if ( ( bExp | bSig ) == 0 ) {
float_raise( float_flag_invalid STATUS_VAR);
- return float64_default_nan;
+ return float64_default_nan();
}
return packFloat64( zSign, 0x7FF, 0 );
}
@@ -3871,7 +3871,7 @@ float64 float64_mul( float64 a, float64
if ( bSig ) return propagateFloat64NaN( a, b STATUS_VAR );
if ( ( aExp | aSig ) == 0 ) {
float_raise( float_flag_invalid STATUS_VAR);
- return float64_default_nan;
+ return float64_default_nan();
}
return packFloat64( zSign, 0x7FF, 0 );
}
@@ -3924,7 +3924,7 @@ float64 float64_div( float64 a, float64
if ( bExp == 0x7FF ) {
if ( bSig ) return propagateFloat64NaN( a, b STATUS_VAR );
float_raise( float_flag_invalid STATUS_VAR);
- return float64_default_nan;
+ return float64_default_nan();
}
return packFloat64( zSign, 0x7FF, 0 );
}
@@ -3936,7 +3936,7 @@ float64 float64_div( float64 a, float64
if ( bSig == 0 ) {
if ( ( aExp | aSig ) == 0 ) {
float_raise( float_flag_invalid STATUS_VAR);
- return float64_default_nan;
+ return float64_default_nan();
}
float_raise( float_flag_divbyzero STATUS_VAR);
return packFloat64( zSign, 0x7FF, 0 );
@@ -3994,7 +3994,7 @@ float64 float64_rem( float64 a, float64
return propagateFloat64NaN( a, b STATUS_VAR );
}
float_raise( float_flag_invalid STATUS_VAR);
- return float64_default_nan;
+ return float64_default_nan();
}
if ( bExp == 0x7FF ) {
if ( bSig ) return propagateFloat64NaN( a, b STATUS_VAR );
@@ -4003,7 +4003,7 @@ float64 float64_rem( float64 a, float64
if ( bExp == 0 ) {
if ( bSig == 0 ) {
float_raise( float_flag_invalid STATUS_VAR);
- return float64_default_nan;
+ return float64_default_nan();
}
normalizeFloat64Subnormal( bSig, &bExp, &bSig );
}
@@ -4104,7 +4104,7 @@ float64 float64_muladd(float64 a, float6
if (infzero) {
float_raise(float_flag_invalid STATUS_VAR);
- return float64_default_nan;
+ return float64_default_nan();
}
if (flags & float_muladd_negate_c) {
@@ -4125,7 +4125,7 @@ float64 float64_muladd(float64 a, float6
if (pInf && (pSign ^ cSign)) {
/* addition of opposite-signed infinities => InvalidOperation */
float_raise(float_flag_invalid STATUS_VAR);
- return float64_default_nan;
+ return float64_default_nan();
}
/* Otherwise generate an infinity of the same sign */
return packFloat64(cSign ^ signflip, 0x7ff, 0);
@@ -4321,12 +4321,12 @@ float64 float64_sqrt( float64 a STATUS_P
if ( aSig ) return propagateFloat64NaN( a, a STATUS_VAR );
if ( ! aSign ) return a;
float_raise( float_flag_invalid STATUS_VAR);
- return float64_default_nan;
+ return float64_default_nan();
}
if ( aSign ) {
if ( ( aExp | aSig ) == 0 ) return a;
float_raise( float_flag_invalid STATUS_VAR);
- return float64_default_nan;
+ return float64_default_nan();
}
if ( aExp == 0 ) {
if ( aSig == 0 ) return float64_zero;
@@ -4374,7 +4374,7 @@ float64 float64_log2( float64 a STATUS_P
}
if ( aSign ) {
float_raise( float_flag_invalid STATUS_VAR);
- return float64_default_nan;
+ return float64_default_nan();
}
if ( aExp == 0x7FF ) {
if ( aSig ) return propagateFloat64NaN( a, float64_zero STATUS_VAR );
@@ -5027,7 +5027,6 @@ static floatx80 subFloatx80Sigs( floatx8
int32 aExp, bExp, zExp;
uint64_t aSig, bSig, zSig0, zSig1;
int32 expDiff;
- floatx80 z;
aSig = extractFloatx80Frac( a );
aExp = extractFloatx80Exp( a );
@@ -5041,9 +5040,7 @@ static floatx80 subFloatx80Sigs( floatx8
return propagateFloatx80NaN( a, b STATUS_VAR );
}
float_raise( float_flag_invalid STATUS_VAR);
- z.low = floatx80_default_nan_low;
- z.high = floatx80_default_nan_high;
- return z;
+ return floatx80_default_nan();
}
if ( aExp == 0 ) {
aExp = 1;
@@ -5135,7 +5132,6 @@ floatx80 floatx80_mul( floatx80 a, float
flag aSign, bSign, zSign;
int32 aExp, bExp, zExp;
uint64_t aSig, bSig, zSig0, zSig1;
- floatx80 z;
aSig = extractFloatx80Frac( a );
aExp = extractFloatx80Exp( a );
@@ -5157,9 +5153,7 @@ floatx80 floatx80_mul( floatx80 a, float
if ( ( aExp | aSig ) == 0 ) {
invalid:
float_raise( float_flag_invalid STATUS_VAR);
- z.low = floatx80_default_nan_low;
- z.high = floatx80_default_nan_high;
- return z;
+ return floatx80_default_nan();
}
return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
}
@@ -5195,7 +5189,6 @@ floatx80 floatx80_div( floatx80 a, float
int32 aExp, bExp, zExp;
uint64_t aSig, bSig, zSig0, zSig1;
uint64_t rem0, rem1, rem2, term0, term1, term2;
- floatx80 z;
aSig = extractFloatx80Frac( a );
aExp = extractFloatx80Exp( a );
@@ -5221,9 +5214,7 @@ floatx80 floatx80_div( floatx80 a, float
if ( ( aExp | aSig ) == 0 ) {
invalid:
float_raise( float_flag_invalid STATUS_VAR);
- z.low = floatx80_default_nan_low;
- z.high = floatx80_default_nan_high;
- return z;
+ return floatx80_default_nan();
}
float_raise( float_flag_divbyzero STATUS_VAR);
return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
@@ -5275,7 +5266,6 @@ floatx80 floatx80_rem( floatx80 a, float
int32 aExp, bExp, expDiff;
uint64_t aSig0, aSig1, bSig;
uint64_t q, term0, term1, alternateASig0, alternateASig1;
- floatx80 z;
aSig0 = extractFloatx80Frac( a );
aExp = extractFloatx80Exp( a );
@@ -5297,9 +5287,7 @@ floatx80 floatx80_rem( floatx80 a, float
if ( bSig == 0 ) {
invalid:
float_raise( float_flag_invalid STATUS_VAR);
- z.low = floatx80_default_nan_low;
- z.high = floatx80_default_nan_high;
- return z;
+ return floatx80_default_nan();
}
normalizeFloatx80Subnormal( bSig, &bExp, &bSig );
}
@@ -5371,7 +5359,6 @@ floatx80 floatx80_sqrt( floatx80 a STATU
int32 aExp, zExp;
uint64_t aSig0, aSig1, zSig0, zSig1, doubleZSig0;
uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3;
- floatx80 z;
aSig0 = extractFloatx80Frac( a );
aExp = extractFloatx80Exp( a );
@@ -5385,9 +5372,7 @@ floatx80 floatx80_sqrt( floatx80 a STATU
if ( ( aExp | aSig0 ) == 0 ) return a;
invalid:
float_raise( float_flag_invalid STATUS_VAR);
- z.low = floatx80_default_nan_low;
- z.high = floatx80_default_nan_high;
- return z;
+ return floatx80_default_nan();
}
if ( aExp == 0 ) {
if ( aSig0 == 0 ) return packFloatx80( 0, 0, 0 );
@@ -6193,7 +6178,6 @@ static float128 subFloat128Sigs( float12
int32 aExp, bExp, zExp;
uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1;
int32 expDiff;
- float128 z;
aSig1 = extractFloat128Frac1( a );
aSig0 = extractFloat128Frac0( a );
@@ -6211,9 +6195,7 @@ static float128 subFloat128Sigs( float12
return propagateFloat128NaN( a, b STATUS_VAR );
}
float_raise( float_flag_invalid STATUS_VAR);
- z.low = float128_default_nan_low;
- z.high = float128_default_nan_high;
- return z;
+ return float128_default_nan();
}
if ( aExp == 0 ) {
aExp = 1;
@@ -6317,7 +6299,6 @@ float128 float128_mul( float128 a, float
flag aSign, bSign, zSign;
int32 aExp, bExp, zExp;
uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3;
- float128 z;
aSig1 = extractFloat128Frac1( a );
aSig0 = extractFloat128Frac0( a );
@@ -6341,9 +6322,7 @@ float128 float128_mul( float128 a, float
if ( ( aExp | aSig0 | aSig1 ) == 0 ) {
invalid:
float_raise( float_flag_invalid STATUS_VAR);
- z.low = float128_default_nan_low;
- z.high = float128_default_nan_high;
- return z;
+ return float128_default_nan();
}
return packFloat128( zSign, 0x7FFF, 0, 0 );
}
@@ -6382,7 +6361,6 @@ float128 float128_div( float128 a, float
int32 aExp, bExp, zExp;
uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;
uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3;
- float128 z;
aSig1 = extractFloat128Frac1( a );
aSig0 = extractFloat128Frac0( a );
@@ -6410,9 +6388,7 @@ float128 float128_div( float128 a, float
if ( ( aExp | aSig0 | aSig1 ) == 0 ) {
invalid:
float_raise( float_flag_invalid STATUS_VAR);
- z.low = float128_default_nan_low;
- z.high = float128_default_nan_high;
- return z;
+ return float128_default_nan();
}
float_raise( float_flag_divbyzero STATUS_VAR);
return packFloat128( zSign, 0x7FFF, 0, 0 );
@@ -6467,7 +6443,6 @@ float128 float128_rem( float128 a, float
uint64_t aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2;
uint64_t allZero, alternateASig0, alternateASig1, sigMean1;
int64_t sigMean0;
- float128 z;
aSig1 = extractFloat128Frac1( a );
aSig0 = extractFloat128Frac0( a );
@@ -6491,9 +6466,7 @@ float128 float128_rem( float128 a, float
if ( ( bSig0 | bSig1 ) == 0 ) {
invalid:
float_raise( float_flag_invalid STATUS_VAR);
- z.low = float128_default_nan_low;
- z.high = float128_default_nan_high;
- return z;
+ return float128_default_nan();
}
normalizeFloat128Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );
}
@@ -6575,7 +6548,6 @@ float128 float128_sqrt( float128 a STATU
int32 aExp, zExp;
uint64_t aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0;
uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3;
- float128 z;
aSig1 = extractFloat128Frac1( a );
aSig0 = extractFloat128Frac0( a );
@@ -6590,9 +6562,7 @@ float128 float128_sqrt( float128 a STATU
if ( ( aExp | aSig0 | aSig1 ) == 0 ) return a;
invalid:
float_raise( float_flag_invalid STATUS_VAR);
- z.low = float128_default_nan_low;
- z.high = float128_default_nan_high;
- return z;
+ return float128_default_nan();
}
if ( aExp == 0 ) {
if ( ( aSig0 | aSig1 ) == 0 ) return packFloat128( 0, 0, 0, 0 );
Index: qemu-git-trunk/include/fpu/softfloat.h
===================================================================
--- qemu-git-trunk.orig/include/fpu/softfloat.h 2014-12-02 00:12:48.308340454
+0000
+++ qemu-git-trunk/include/fpu/softfloat.h 2014-12-02 00:13:14.309029586
+0000
@@ -326,7 +326,7 @@ static inline int float16_is_any_nan(flo
/*----------------------------------------------------------------------------
| The pattern for a default generated half-precision NaN.
*----------------------------------------------------------------------------*/
-extern const float16 float16_default_nan;
+__inline__ float16 float16_default_nan(void);
/*----------------------------------------------------------------------------
| Software IEC/IEEE single-precision conversion routines.
@@ -438,7 +438,7 @@ static inline float32 float32_set_sign(f
/*----------------------------------------------------------------------------
| The pattern for a default generated single-precision NaN.
*----------------------------------------------------------------------------*/
-extern const float32 float32_default_nan;
+__inline__ float32 float32_default_nan(void);
/*----------------------------------------------------------------------------
| Software IEC/IEEE double-precision conversion routines.
@@ -550,7 +550,7 @@ static inline float64 float64_set_sign(f
/*----------------------------------------------------------------------------
| The pattern for a default generated double-precision NaN.
*----------------------------------------------------------------------------*/
-extern const float64 float64_default_nan;
+__inline__ float64 float64_default_nan(void);
/*----------------------------------------------------------------------------
| Software IEC/IEEE extended double-precision conversion routines.
@@ -635,7 +635,7 @@ static inline int floatx80_is_any_nan(fl
/*----------------------------------------------------------------------------
| The pattern for a default generated extended double-precision NaN.
*----------------------------------------------------------------------------*/
-extern const floatx80 floatx80_default_nan;
+__inline__ floatx80 floatx80_default_nan(void);
/*----------------------------------------------------------------------------
| Software IEC/IEEE quadruple-precision conversion routines.
@@ -716,6 +716,6 @@ static inline int float128_is_any_nan(fl
/*----------------------------------------------------------------------------
| The pattern for a default generated quadruple-precision NaN.
*----------------------------------------------------------------------------*/
-extern const float128 float128_default_nan;
+__inline__ float128 float128_default_nan(void);
#endif /* !SOFTFLOAT_H */
Index: qemu-git-trunk/target-arm/helper-a64.c
===================================================================
--- qemu-git-trunk.orig/target-arm/helper-a64.c 2014-12-02 00:12:48.308340454
+0000
+++ qemu-git-trunk/target-arm/helper-a64.c 2014-12-02 00:13:14.309029586
+0000
@@ -342,7 +342,7 @@ float32 HELPER(frecpx_f32)(float32 a, vo
nan = float32_maybe_silence_nan(a);
}
if (fpst->default_nan_mode) {
- nan = float32_default_nan;
+ nan = float32_default_nan();
}
return nan;
}
@@ -371,7 +371,7 @@ float64 HELPER(frecpx_f64)(float64 a, vo
nan = float64_maybe_silence_nan(a);
}
if (fpst->default_nan_mode) {
- nan = float64_default_nan;
+ nan = float64_default_nan();
}
return nan;
}
Index: qemu-git-trunk/target-arm/helper.c
===================================================================
--- qemu-git-trunk.orig/target-arm/helper.c 2014-12-02 00:12:48.308340454
+0000
+++ qemu-git-trunk/target-arm/helper.c 2014-12-02 00:13:14.309029586 +0000
@@ -5836,7 +5836,7 @@ float32 HELPER(recpe_f32)(float32 input,
nan = float32_maybe_silence_nan(f32);
}
if (fpst->default_nan_mode) {
- nan = float32_default_nan;
+ nan = float32_default_nan();
}
return nan;
} else if (float32_is_infinity(f32)) {
@@ -5890,7 +5890,7 @@ float64 HELPER(recpe_f64)(float64 input,
nan = float64_maybe_silence_nan(f64);
}
if (fpst->default_nan_mode) {
- nan = float64_default_nan;
+ nan = float64_default_nan();
}
return nan;
} else if (float64_is_infinity(f64)) {
@@ -5997,7 +5997,7 @@ float32 HELPER(rsqrte_f32)(float32 input
nan = float32_maybe_silence_nan(f32);
}
if (s->default_nan_mode) {
- nan = float32_default_nan;
+ nan = float32_default_nan();
}
return nan;
} else if (float32_is_zero(f32)) {
@@ -6005,7 +6005,7 @@ float32 HELPER(rsqrte_f32)(float32 input
return float32_set_sign(float32_infinity, float32_is_neg(f32));
} else if (float32_is_neg(f32)) {
float_raise(float_flag_invalid, s);
- return float32_default_nan;
+ return float32_default_nan();
} else if (float32_is_infinity(f32)) {
return float32_zero;
}
@@ -6061,7 +6061,7 @@ float64 HELPER(rsqrte_f64)(float64 input
nan = float64_maybe_silence_nan(f64);
}
if (s->default_nan_mode) {
- nan = float64_default_nan;
+ nan = float64_default_nan();
}
return nan;
} else if (float64_is_zero(f64)) {
@@ -6069,7 +6069,7 @@ float64 HELPER(rsqrte_f64)(float64 input
return float64_set_sign(float64_infinity, float64_is_neg(f64));
} else if (float64_is_neg(f64)) {
float_raise(float_flag_invalid, s);
- return float64_default_nan;
+ return float64_default_nan();
} else if (float64_is_infinity(f64)) {
return float64_zero;
}
Index: qemu-git-trunk/target-mips/msa_helper.c
===================================================================
--- qemu-git-trunk.orig/target-mips/msa_helper.c 2014-12-02
00:12:48.308340454 +0000
+++ qemu-git-trunk/target-mips/msa_helper.c 2014-12-02 00:13:14.309029586
+0000
@@ -1503,11 +1503,11 @@ MSA_UNOP_DF(pcnt)
#define FLOAT_ONE32 make_float32(0x3f8 << 20)
#define FLOAT_ONE64 make_float64(0x3ffULL << 52)
-#define FLOAT_SNAN16 (float16_default_nan ^ 0x0220)
+#define FLOAT_SNAN16 (float16_default_nan() ^ 0x0220)
/* 0x7c20 */
-#define FLOAT_SNAN32 (float32_default_nan ^ 0x00400020)
+#define FLOAT_SNAN32 (float32_default_nan() ^ 0x00400020)
/* 0x7f800020 */
-#define FLOAT_SNAN64 (float64_default_nan ^ 0x0008000000000020ULL)
+#define FLOAT_SNAN64 (float64_default_nan() ^ 0x0008000000000020ULL)
/* 0x7ff0000000000020 */
static inline void clear_msacsr_cause(CPUMIPSState *env)
