Fixed in v9 as well as all other misordered instances added. On 31 October 2014 08:35, Peter Maydell <peter.mayd...@linaro.org> wrote:
> On 30 October 2014 21:28, Greg Bellows <greg.bell...@linaro.org> wrote: > > From: Fabian Aggeler <aggel...@ethz.ch> > > > > Use MVBAR register as exception vector base address for > > exceptions taken to CPU monitor mode. > > > > Signed-off-by: Sergey Fedorov <s.fedo...@samsung.com> > > Signed-off-by: Fabian Aggeler <aggel...@ethz.ch> > > Signed-off-by: Greg Bellows <greg.bell...@linaro.org> > > If you put the cp/opc fields in the right order, then > Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> > > (I shan't mention field ordering again but you can assume > it applies to all the other patches in this series too.) > > thanks > -- PMM >
