On 30 October 2014 21:28, Greg Bellows <greg.bell...@linaro.org> wrote:
> From: Fabian Aggeler <aggel...@ethz.ch>
>
> SCR.{IRQ/FIQ} bits allow to route IRQ/FIQ exceptions to monitor CPU
> mode. When taking IRQ exception to monitor mode FIQ exception is
> additionally masked.
>
> Signed-off-by: Sergey Fedorov <s.fedo...@samsung.com>
> Signed-off-by: Fabian Aggeler <aggel...@ethz.ch>
> Signed-off-by: Greg Bellows <greg.bell...@linaro.org>Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> thanks -- PMM
