On 9/11/2014 2:17 PM, Pierre Mallard wrote:
> This patch add a new processor type 440x5wDFPU for Virtex 5 PPC440
> with an external APU FPU in double precision mode
> ---
> target-ppc/cpu-models.c | 3 +++
> target-ppc/translate_init.c | 38 ++++++++++++++++++++++++++++++++++++++
> 2 files changed, 41 insertions(+)
>
> diff --git a/target-ppc/cpu-models.c b/target-ppc/cpu-models.c
> index 52ac6ec..91e9fac 100644
> --- a/target-ppc/cpu-models.c
> +++ b/target-ppc/cpu-models.c
> @@ -309,6 +309,9 @@
> #endif
> POWERPC_DEF("440-Xilinx", CPU_POWERPC_440_XILINX, 440x5,
> "PowerPC 440 Xilinx 5")
> +
> + POWERPC_DEF("440-Xilinx-w-dfpu", CPU_POWERPC_440_XILINX,
> 440x5wDFPU,
> + "PowerPC 440 Xilinx 5 With a Double Prec. FPU")
> #if defined(TODO)
> POWERPC_DEF("440A5", CPU_POWERPC_440A5, 440x5,
> "PowerPC 440 A5")
> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
> index ac4d12a..7d7dce7 100644
> --- a/target-ppc/translate_init.c
> +++ b/target-ppc/translate_init.c
> @@ -3923,6 +3923,44 @@ POWERPC_FAMILY(440x5)(ObjectClass *oc, void *data)
> POWERPC_FLAG_DE | POWERPC_FLAG_BUS_CLK;
> }
>
> +POWERPC_FAMILY(440x5wDFPU)(ObjectClass *oc, void *data)
> +{
> + DeviceClass *dc = DEVICE_CLASS(oc);
> + PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
> +
> + dc->desc = "PowerPC 440x5 with double precision FPU";
> + pcc->init_proc = init_proc_440x5;
> + pcc->check_pow = check_pow_nocheck;
> + pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING |
> + PPC_FLOAT | PPC_FLOAT_FSQRT |
> + PPC_FLOAT_STFIWX |
> + PPC_DCR | PPC_WRTEE | PPC_RFMCI |
> + PPC_CACHE | PPC_CACHE_ICBI |
> + PPC_CACHE_DCBZ | PPC_CACHE_DCBA |
> + PPC_MEM_TLBSYNC | PPC_MFTB |
> + PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC |
> + PPC_440_SPEC;
> + pcc->insns_flags2 = PPC2_FP_CVT_S64;
> + pcc->msr_mask = (1ull << MSR_POW) |
> + (1ull << MSR_CE) |
> + (1ull << MSR_EE) |
> + (1ull << MSR_PR) |
> + (1ull << MSR_FP) |
> + (1ull << MSR_ME) |
> + (1ull << MSR_FE0) |
> + (1ull << MSR_DWE) |
> + (1ull << MSR_DE) |
> + (1ull << MSR_FE1) |
> + (1ull << MSR_IR) |
> + (1ull << MSR_DR);
> + pcc->mmu_model = POWERPC_MMU_BOOKE;
> + pcc->excp_model = POWERPC_EXCP_BOOKE;
> + pcc->bus_model = PPC_FLAGS_INPUT_BookE;
> + pcc->bfd_mach = bfd_mach_ppc_403;
> + pcc->flags = POWERPC_FLAG_CE | POWERPC_FLAG_DWE |
> + POWERPC_FLAG_DE | POWERPC_FLAG_BUS_CLK;
> +}
> +
> static void init_proc_460 (CPUPPCState *env)
> {
> /* Time base */
>
I don't see any significant issues with this patch, but it does not pass the
patch checker:
> ./scripts/checkpatch.pl ../patches/pierre.mallard.fctid.v2/0002.patch
WARNING: line over 80 characters
#19: FILE: target-ppc/cpu-models.c:313:
+ POWERPC_DEF("440-Xilinx-w-dfpu", CPU_POWERPC_440_XILINX,
440x5wDFPU,
ERROR: trailing whitespace
#41: FILE: target-ppc/translate_init.c:3935:
+ PPC_FLOAT | PPC_FLOAT_FSQRT | $
ERROR: Missing Signed-off-by: line(s)
total: 2 errors, 1 warnings, 53 lines checked
../patches/pierre.mallard.fctid.v2/0002.patch has style problems, please
review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
