On Thu, Aug 14, 2014 at 06:08:44PM +0200, Michael S. Tsirkin wrote: > From: Jan Kiszka <jan.kis...@siemens.com> > > The spec says (and real HW confirms this) that, if the bus master bit > is 0, the device will not generate any PCI accesses. MSI and MSI-X > messages fall among these, so we should use the corresponding address > space to deliver them. This will prevent delivery if bus master support > is disabled. > > Cc: qemu-sta...@nongnu.org
This is reported to break old guests which incorrectly don't enable bus mastering. Worth fixing (virtio needs a work-around) but please drop the patch from qemu-stable. Thanks! > Signed-off-by: Jan Kiszka <jan.kis...@siemens.com> > Reviewed-by: Michael S. Tsirkin <m...@redhat.com> > Signed-off-by: Michael S. Tsirkin <m...@redhat.com> > --- > hw/pci/msi.c | 2 +- > hw/pci/msix.c | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/hw/pci/msi.c b/hw/pci/msi.c > index a4a3040..52d2313 100644 > --- a/hw/pci/msi.c > +++ b/hw/pci/msi.c > @@ -291,7 +291,7 @@ void msi_notify(PCIDevice *dev, unsigned int vector) > "notify vector 0x%x" > " address: 0x%"PRIx64" data: 0x%"PRIx32"\n", > vector, msg.address, msg.data); > - stl_le_phys(&address_space_memory, msg.address, msg.data); > + stl_le_phys(&dev->bus_master_as, msg.address, msg.data); > } > > /* Normally called by pci_default_write_config(). */ > diff --git a/hw/pci/msix.c b/hw/pci/msix.c > index 5c49bfc..20ae476 100644 > --- a/hw/pci/msix.c > +++ b/hw/pci/msix.c > @@ -439,7 +439,7 @@ void msix_notify(PCIDevice *dev, unsigned vector) > > msg = msix_get_message(dev, vector); > > - stl_le_phys(&address_space_memory, msg.address, msg.data); > + stl_le_phys(&dev->bus_master_as, msg.address, msg.data); > } > > void msix_reset(PCIDevice *dev) > -- > MST >
