On 26 August 2014 05:09, Peter Crosthwaite <peter.crosthwa...@xilinx.com> wrote: > This patch series continues on from Alistairs original PMCCNTR patch > work. The counter is extended to 64-bit. > > V4: > - Drop all EL awareness. > V3: > -Tidy up the arm_ccnt_enabled() > -Fixed an old commit message refering to the CCNT_ENABLED > macro > -Do EL change sync in pstate_write instead of in multiple > code paths. > -Addressed PMM V2 review > V2: > -Fix some typos identified by Christopher Covington > -Convert the CCNT_ENABLED macro to the arm_ccnt_enabled > function > > > Alistair Francis (6): > target-arm: Make the ARM PMCCNTR register 64-bit > target-arm: Implement PMCCNTR_EL0 and related registers > target-arm: Add arm_ccnt_enabled function > target-arm: Implement pmccntr_sync function > target-arm: Remove old code and replace with new functions > target-arm: Implement pmccfiltr_write function > > Peter Crosthwaite (1): > arm: Implement PMCCNTR 32b read-modify-write
Applied to target-arm.next, thanks. (I fixed some minor typos in the doc comment for pmccntr_sync.) -- PMM
