Hello, I submit a patch to fix bugs 661696 and 1248376. This is the second version of this patch, this version requires less TCG operations to execute. As mentioned in a previous email, the patch implements, for TCG, the specifications provided in Intel and AMD programmer's manuals regarding the x87 exception pointers. That is, when executing instructions fstenv/fnstenv, fsave and fxsave the values for the instruction pointer, data pointer and opcode of the last non-control x87 instruction executed, are correctly saved to the specified memory address. When executing instructions fldenv, frstor and fxrstor the values that are going to be considered the instruction pointer, data pointer and opcode of the last non-control x87 instruction are obtained from the specified memory address.
I divided this patch in 8 parts. Best regards, Jaume linux-user/signal.c | 4 target-i386/cpu.h | 9 - target-i386/fpu_helper.c | 218 +++++++++++++++++++++++++++++++---------- target-i386/helper.h | 12 +- target-i386/machine.c | 2 target-i386/translate.c | 202 ++++++++++++++++++++++++++++++++++++-- tests/tcg/test-i386.c | 66 +++++++++++- target-i386/translate.c | 238 +++++++++++++++++++++++---------------------- 8 files changed, 558 insertions(+), 193 deletions(-)
