On 08/22/2014 09:52 AM, Bastian Koppelmann wrote: > Hi, > > my aim is to add Infineon's TriCore architecture to QEMU. This series of > patches adds the target stubs, a basic testboard and a softmmu for system > mode emulation. Furthermore it adds all the 16 bit long instructions of the > architecture grouped by opcode format. > > After this series of patches. Another one will follow, which adds a lot of > the 32 bit long instructions. > > All the best > > Bastian > > Richard Henderson: Thanks alot for the great feedback, I really appreciate it. > > v5 -> v6: > - Add myself to MAINTAINERS > - tricore_testboard: Fix machine name containing blanks. > - get_physical_address: Add PAGE_EXEC permission. > - gen_shaci: Add calculation of PSW.C to shift_count = -32 case. > - gen_intermediate_code_internal: Replace gen_goto_tb with setting of > next_pc and exit_tb(0). > - SBC/SBR_JEQ: Negate condition. > - Formating fixes.
Peter, I think the translator is in good enough shape to merge. I've briefly looked over the board-level stuff, and it looks ok, but I don't really know what traps to look out for over there. r~
