On Fri, Aug 08, 2014 at 05:23:36PM +0100, Mark Cave-Ayland wrote: > @@ -322,6 +342,10 @@ static int pci_cmd646_ide_initfn(PCIDevice *dev) > } > > /* Set write-to-clear interrupt bits */ > + dev->wmask[CFR] = 0x0; > + dev->w1cmask[CFR] = CFR_INTR_CH0; > + dev->wmask[ARTTIM23] = 0x0; > + dev->w1cmask[ARTTIM23] = ARTTIM23_INTR_CH1; > dev->wmask[MRDMODE] = 0x0; > dev->w1cmask[MRDMODE] = MRDMODE_INTR_CH0 | MRDMODE_INTR_CH1;
It is not clear to me why the mask for MRDMODE has both Channel 0 and 1 but the ARTTIM23 and CFR masks only have one channel each. Please post a link to the datasheet.
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