The mac99 machine really doesn't have any shifts in NVRAM usage. It simply has
a 1:1 MMIO mapped space where a guest can access the NVRAM data.
This patch fixes up the incorrect format we use for NVRAM today, making Mac OS
X happy and able to read NVRAM.
This patch also requires a new OpenBIOS version. To ensure bisectaibility,
we provide a fw_cfg hint to tell OpenBIOS that NVRAM is now flat.
Signed-off-by: Alexander Graf <ag...@suse.de>
---
WARNING! This patch breaks compatibility with older OpenBIOS which can
no longer read data from NVRAM after this patch is applied to populate
its prom variables.
---
hw/ppc/mac_newworld.c | 7 ++++---
include/hw/ppc/ppc.h | 1 +
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index e96b635..32ee2f2 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -435,12 +435,12 @@ static void ppc_core99_init(MachineState *machine)
}
#endif
dev = qdev_create(NULL, TYPE_MACIO_NVRAM);
- qdev_prop_set_uint32(dev, "size", 0x2000);
- qdev_prop_set_uint32(dev, "it_shift", 1);
+ qdev_prop_set_uint32(dev, "size", 0x4000);
+ qdev_prop_set_uint32(dev, "it_shift", 0);
qdev_init_nofail(dev);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, nvram_addr);
nvr = MACIO_NVRAM(dev);
- pmac_format_nvram_partition(nvr, 0x2000);
+ pmac_format_nvram_partition(nvr, 0x4000);
/* No PCI init: the BIOS will do it */
fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
@@ -482,6 +482,7 @@ static void ppc_core99_init(MachineState *machine)
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ);
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ);
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_NVRAM_ADDR, nvram_addr);
+ fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_NVRAM_FLAT, 1);
qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
}
diff --git a/include/hw/ppc/ppc.h b/include/hw/ppc/ppc.h
index 14efd0c..7b13cee 100644
--- a/include/hw/ppc/ppc.h
+++ b/include/hw/ppc/ppc.h
@@ -94,6 +94,7 @@ enum {
#define FW_CFG_PPC_KVM_PID (FW_CFG_ARCH_LOCAL + 0x07)
#define FW_CFG_PPC_NVRAM_ADDR (FW_CFG_ARCH_LOCAL + 0x08)
#define FW_CFG_PPC_BUSFREQ (FW_CFG_ARCH_LOCAL + 0x09)
+#define FW_CFG_PPC_NVRAM_FLAT (FW_CFG_ARCH_LOCAL + 0x0a)
#define PPC_SERIAL_MM_BAUDBASE 399193
--
1.8.1.4
