Ignore DNZ if software completion isn't used. Raise INV for
denormals in system mode so the OS completion handler sees them.
Reported-by: Al Viro <v...@zeniv.linux.org.uk>
Signed-off-by: Richard Henderson <r...@twiddle.net>
---
target-alpha/fpu_helper.c | 33 +++++++++++++++++++++++----------
target-alpha/helper.h | 1 +
target-alpha/translate.c | 7 +++++++
3 files changed, 31 insertions(+), 10 deletions(-)
diff --git a/target-alpha/fpu_helper.c b/target-alpha/fpu_helper.c
index f7fe31e..cf6c44a 100644
--- a/target-alpha/fpu_helper.c
+++ b/target-alpha/fpu_helper.c
@@ -110,16 +110,14 @@ void helper_ieee_input(CPUAlphaState *env, uint64_t val)
uint64_t frac = val & 0xfffffffffffffull;
if (exp == 0) {
- /* Denormals without DNZ set raise an exception. */
- if (frac != 0 && !env->fp_status.flush_inputs_to_zero) {
- arith_excp(env, GETPC(), EXC_M_UNF, 0);
+ /* Denormals without /S raise an exception. */
+ if (frac != 0) {
+ arith_excp(env, GETPC(), EXC_M_INV, 0);
}
} else if (exp == 0x7ff) {
/* Infinity or NaN. */
- /* ??? I'm not sure these exception bit flags are correct. I do
- know that the Linux kernel, at least, doesn't rely on them and
- just emulates the insn to figure out what exception to use. */
- arith_excp(env, GETPC(), frac ? EXC_M_INV : EXC_M_FOV, 0);
+ env->fpcr_exc_status |= float_flag_invalid;
+ arith_excp(env, GETPC(), EXC_M_INV, 0);
}
}
@@ -130,16 +128,31 @@ void helper_ieee_input_cmp(CPUAlphaState *env, uint64_t
val)
uint64_t frac = val & 0xfffffffffffffull;
if (exp == 0) {
- /* Denormals without DNZ set raise an exception. */
- if (frac != 0 && !env->fp_status.flush_inputs_to_zero) {
- arith_excp(env, GETPC(), EXC_M_UNF, 0);
+ /* Denormals without /S raise an exception. */
+ if (frac != 0) {
+ arith_excp(env, GETPC(), EXC_M_INV, 0);
}
} else if (exp == 0x7ff && frac) {
/* NaN. */
+ env->fpcr_exc_status |= float_flag_invalid;
arith_excp(env, GETPC(), EXC_M_INV, 0);
}
}
+/* Input handing with software completion. Trap for denorms, unless DNZ
+ is set. If we try to support DNOD (which none of the produced hardware
+ did, AFAICS), we'll need to suppress the trap when FPCR.DNOD is set;
+ then the code downstream of that will need to cope with denorms sans
+ flush_input_to_zero. Most of it should work sanely, but there's
+ nothing to compare with. */
+void helper_ieee_input_s(CPUAlphaState *env, uint64_t val)
+{
+ if (unlikely(2 * val - 1 < 0x1fffffffffffffull)
+ && !env->fp_status.flush_inputs_to_zero) {
+ arith_excp(env, GETPC(), EXC_M_INV | EXC_M_SWC, 0);
+ }
+}
+
/* F floating (VAX) */
static uint64_t float32_to_f(float32 fa)
{
diff --git a/target-alpha/helper.h b/target-alpha/helper.h
index 2cc100b..596f24d 100644
--- a/target-alpha/helper.h
+++ b/target-alpha/helper.h
@@ -88,6 +88,7 @@ DEF_HELPER_FLAGS_3(fp_exc_raise_s, TCG_CALL_NO_WG, void, env,
i32, i32)
DEF_HELPER_FLAGS_2(ieee_input, TCG_CALL_NO_WG, void, env, i64)
DEF_HELPER_FLAGS_2(ieee_input_cmp, TCG_CALL_NO_WG, void, env, i64)
+DEF_HELPER_FLAGS_2(ieee_input_s, TCG_CALL_NO_WG, void, env, i64)
DEF_HELPER_FLAGS_2(fcvtql_v_input, TCG_CALL_NO_WG, void, env, i64)
#if !defined (CONFIG_USER_ONLY)
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 5785dd7..3a7c2ba 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -655,6 +655,13 @@ static TCGv gen_ieee_input(DisasContext *ctx, int reg, int
fn11, int is_cmp)
} else {
gen_helper_ieee_input(cpu_env, val);
}
+ } else {
+#ifndef CONFIG_USER_ONLY
+ /* In system mode, raise exceptions for denormals like real
+ hardware. In user mode, proceed as if the OS completion
+ handler is handling the denormal as per spec. */
+ gen_helper_ieee_input_s(cpu_env, val);
+#endif
}
}
return val;
--
1.9.3
