From: Greg Bellows <greg.bell...@linaro.org>
This patch adds code to mark duplicate CP register registrations as NO_MIGRATE
to avoid duplicate migrations.
Signed-off-by: Greg Bellows <greg.bell...@linaro.org>
---
target-arm/helper.c | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 3bc55fe..7c1e2eb 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2339,7 +2339,11 @@ static const ARMCPRegInfo v8_el3_cp_reginfo[] = {
.access = PL3_RW, .writefn = vbar_write,
.fieldoffset = offsetof(CPUARMState, cp15.vbar_el[3]),
.resetvalue = 0 },
- { .name = "SCR_EL3", .state = ARM_CP_STATE_AA64,
+ /* SCR will always be registered for v7, but not necessarily for v8, so
+ * this entry is marked to allow migration to be handled by the v7
+ * registration instance.
+ */
+ { .name = "SCR_EL3", .state = ARM_CP_STATE_AA64, .type = ARM_CP_NO_MIGRATE,
.opc0 = 3, .opc1 = 6, .crn = 1, .crm = 1, .opc2 = 0,
.access = PL3_RW, .fieldoffset = offsetof(CPUARMState, cp15.scr_el3),
.writefn = scr_write },
@@ -2958,6 +2962,11 @@ static void add_cpreg_to_hashtable(ARMCPU *cpu, const
ARMCPRegInfo *r,
* banked registers but later only fieldoffset is used.
*/
r2->fieldoffset = r->bank_fieldoffsets[nsbit];
+ } else if (!nsbit) {
+ /* The register is not banked so we only want to allow migration of
+ * the non-secure instance.
+ */
+ r2->type |= ARM_CP_NO_MIGRATE;
}
if (r->state == ARM_CP_STATE_BOTH) {
--
1.8.3.2
