On 24 June 2014 02:11, Alistair Francis <alistair.fran...@xilinx.com> wrote: > This patch series continues on from my original PMCCNTR patch > work to extend the counter to be 64-bit and support for the > PMCCFILTR_EL0 register which allows the counter to be > disabled based on the current EL > > Alistair Francis (7): > target-arm: Make the ARM PMCCNTR register 64-bit > target-arm: Implement PMCCNTR_EL0 and related registers > target-arm: Add helper macros and defines for CCNT register > target-arm: Implement pmccntr_sync function > target-arm: Remove old code and replace with new functions > target-arm: Implement pmccfiltr_write function > target-arm: Call the pmccntr_sync function when swapping ELs
Hi. This is still on my must-review queue but I think it is too late for 2.1. thanks -- PMM
