The device endianness is the cpu endianness at device reset time.
Signed-off-by: Greg Kurz <gk...@linux.vnet.ibm.com>
Reviewed-by: Alexander Graf <ag...@suse.de>
---
Changes since v8:
- added missing register sync
target-ppc/cpu.h | 2 ++
target-ppc/translate_init.c | 15 +++++++++++++++
2 files changed, 17 insertions(+)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 74407ee..9206556 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -29,6 +29,8 @@
#define TARGET_LONG_BITS 64
#define TARGET_PAGE_BITS 12
+#define TARGET_IS_BIENDIAN 1
+
/* Note that the official physical address space bits is 62-M where M
is implementation dependent. I've not looked up M for the set of
cpus we emulate at the system level. */
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 85581c9..73279b9 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -9584,6 +9584,18 @@ static void ppc_cpu_reset(CPUState *s)
tlb_flush(s, 1);
}
+#ifndef CONFIG_USER_ONLY
+static bool ppc_cpu_is_big_endian(CPUState *cs)
+{
+ PowerPCCPU *cpu = POWERPC_CPU(cs);
+ CPUPPCState *env = &cpu->env;
+
+ cpu_synchronize_state(cs);
+
+ return !msr_le;
+}
+#endif
+
static void ppc_cpu_initfn(Object *obj)
{
CPUState *cs = CPU(obj);
@@ -9672,6 +9684,9 @@ static void ppc_cpu_class_init(ObjectClass *oc, void
*data)
#else
cc->gdb_core_xml_file = "power-core.xml";
#endif
+#ifndef CONFIG_USER_ONLY
+ cc->virtio_is_big_endian = ppc_cpu_is_big_endian;
+#endif
dc->fw_name = "PowerPC,UNKNOWN";
}
