This patch series continues on from my original PMCCNTR patch work to extend the counter to be 64-bit and support for the PMCCFILTR_EL0 register which allows the counter to be disabled based on the current EL
Alistair Francis (7): target-arm: Make the ARM PMCCNTR register 64-bit target-arm: Implement PMCCNTR_EL0 and related registers target-arm: Add helper macros and defines for CCNT register target-arm: Implement pmccntr_sync function target-arm: Remove old code and replace with new functions target-arm: Implement pmccfiltr_write function target-arm: Call the pmccntr_sync function when swapping ELs target-arm/cpu.h | 33 +++++++++++++- target-arm/helper-a64.c | 5 ++ target-arm/helper.c | 114 ++++++++++++++++++++++++++++++++++------------ target-arm/op_helper.c | 6 +++ 4 files changed, 127 insertions(+), 31 deletions(-)
