From: Peter Crosthwaite <peter.crosthwa...@xilinx.com>
There is no CTRL_I bit in the pong buffer control register. The
CTRL_I bit from the ping buffer masks both ping and pong buffers.
Fix.
Signed-off-by: Peter Crosthwaite <peter.crosthwa...@xilinx.com>
Signed-off-by: Stefan Hajnoczi <stefa...@redhat.com>
---
hw/net/xilinx_ethlite.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c
index 5a434f6..1b177b3 100644
--- a/hw/net/xilinx_ethlite.c
+++ b/hw/net/xilinx_ethlite.c
@@ -196,8 +196,9 @@ static ssize_t eth_rx(NetClientState *nc, const uint8_t
*buf, size_t size)
memcpy(&s->regs[rxbase + R_RX_BUF0], buf, size);
s->regs[rxbase + R_RX_CTRL0] |= CTRL_S;
- if (s->regs[rxbase + R_RX_CTRL0] & CTRL_I)
+ if (s->regs[R_RX_CTRL0] & CTRL_I) {
eth_pulse_irq(s);
+ }
/* If c_rx_pingpong was set flip buffers. */
s->rxbuf ^= s->c_rx_pingpong;
--
1.9.3
