2010/1/15 Blue Swirl <blauwir...@gmail.com>: > On Fri, Jan 15, 2010 at 9:11 PM, Artyom Tarasenko > <atar4q...@googlemail.com> wrote: >> 2010/1/15 Blue Swirl <blauwir...@gmail.com>: >>> On Fri, Jan 15, 2010 at 6:46 PM, Artyom Tarasenko >>> <atar4q...@googlemail.com> wrote: >>>> According to pages 9-31 - 9-34 of "SuperSPARC & MultiCache Controller >>>> User's Manual": >>>> >>>> 1. "A lower priority fault may not overwrite the >>>> MFSR status of a higher priority fault." >>>> 2. The MFAR is overwritten according to the policy defined for the MFSR >>>> 3. The overwrite bit is asserted if the fault status register (MFSR) >>>> has been written more than once by faults of the same class >>>> 4. SuperSPARC will never place instruction fault addresses in the MFAR. >>>> >>>> Implementation of points 1-3 allows booting Solaris 2.6 and 2.5.1. >>> >>> Nice work! This also passes my tests. >> >> I'm afraid we still are not there yet though: Solaris 7 fails potentially >> due to >> another bug in the MMU emulation, and the initial [missing-] RAM >> detection in OBP fails >> very probably due to a bug in in the MMU emulation. > > Some guesses: > - Access to unassigned RAM area may be handled by the memory > controller differently (no faults, different faults etc.) than > unassigned access to SBus or other area.
It is possible, but may not be the only reason: -M SS-20 -cpu "TI SuperSparc 50" detects missing RAM properly, and -cpu "TI SuperSparc 51" doesn't. Looks like the problem has to do with the cache. Also Solaris 2.5&2.6 hang with -M SS-20 very early, at the place where they say "vac: enabled in write through mode" on SS-5. Unfortunately I don't know any cacheless SS-5 cpu, which would have helped to prove the hypothesis. > - Real RAM banks have aliasing effects (which could be emulated by > mapping the aliased RAM areas many times). They do, but afaics it should be relevant only for sizes < max RAM bank size. > - OBP on machines with ECC controller may detect missing RAM using ECC > checks. There is a special message in OBP for ECC failures. (I know it is a weak argument, but still). -- Regards, Artyom Tarasenko solaris/sparc under qemu blog: http://tyom.blogspot.com/
