On Tue, 29 Apr 2014 11:22:38 +0200
Alexander Graf <ag...@suse.de> wrote:
>
> On 29.04.14 11:15, Greg Kurz wrote:
> > POWER7, POWER7+ and POWER8 families use the ILE bit of the LPCR
> > special purpose register to decide the endianness to use when
> > entering interrupt handlers. When running a Linux guest, this
> > provides a hint on the endianness used by the kernel. From a
> > QEMU point of view, the information is needed for legacy virtio
> > support and crash dump support as well.
> >
> > Suggested-by: Benjamin Herrenschmidt <b...@kernel.crashing.org>
> > Suggested-by: Alexander Graf <ag...@suse.de>
> > Signed-off-by: Greg Kurz <gk...@linux.vnet.ibm.com>
> > ---
> >
> > Changes for v2:
> > - the interrupts_big_endian method now takes a PowerPCCPU * arg
> > - added the ppc_cpu_ prefix to the interrupts_big_endian_* functions
> > - added white line in ppc_cpu_interrupts_big_endian()
> > - s/qemu/QEMU and s/linux/Linux in the commit message
> >
> > Andreas,
> >
> > I did not lowercase ppc_cpu_interrupts_big_endian_POWER7 as most of the
> > recent additions for POWER8 and POWER7+ have uppercase in the function
> > names.
> >
> > Regards.
> >
> > --
> > Greg
> >
> > target-ppc/cpu-qom.h | 2 ++
> > target-ppc/misc_helper.c | 8 ++++++++
> > target-ppc/translate_init.c | 16 ++++++++++++++++
> > 3 files changed, 26 insertions(+)
> >
> > diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h
> > index 47dc8e6..beec3ab 100644
> > --- a/target-ppc/cpu-qom.h
> > +++ b/target-ppc/cpu-qom.h
> > @@ -76,6 +76,7 @@ typedef struct PowerPCCPUClass {
> > int (*handle_mmu_fault)(PowerPCCPU *cpu, target_ulong eaddr, int rwx,
> > int mmu_idx);
> > #endif
> > + bool (*interrupts_big_endian)(PowerPCCPU *cpu);
> > } PowerPCCPUClass;
> >
> > /**
> > @@ -118,6 +119,7 @@ int
> > ppc64_cpu_write_elf64_qemunote(WriteCoreDumpFunction f,
> > CPUState *cpu, void *opaque);
> > int ppc64_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
> > int cpuid, void *opaque);
> > +bool ppc_cpu_interrupts_big_endian(CPUState *cs);
> > #ifndef CONFIG_USER_ONLY
> > extern const struct VMStateDescription vmstate_ppc_cpu;
> > #endif
> > diff --git a/target-ppc/misc_helper.c b/target-ppc/misc_helper.c
> > index 2eb2fa6..2bc3ba3 100644
> > --- a/target-ppc/misc_helper.c
> > +++ b/target-ppc/misc_helper.c
> > @@ -120,3 +120,11 @@ void ppc_store_msr(CPUPPCState *env, target_ulong
> > value)
> > {
> > hreg_store_msr(env, value, 0);
> > }
> > +
> > +bool ppc_cpu_interrupts_big_endian(CPUState *cs)
> > +{
> > + PowerPCCPU *cpu = POWERPC_CPU(cs);
> > + PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
> > +
> > + return pcc->interrupts_big_endian(cpu);
>
> No need for this. Please open code this helper in the calling code.
>
You may know that I have another user for this in the virtio endian patch set...
of course, I understand that virtio may take some more time to mature and this
helper could sit there for a long time... So should I open code it anyway ?
>
> Alex
>
>
Alex,
--
Gregory Kurz kurzg...@fr.ibm.com
gk...@linux.vnet.ibm.com
Software Engineer @ IBM/Meiosys http://www.ibm.com
Tel +33 (0)562 165 496
"Anarchy is about taking complete responsibility for yourself."
Alan Moore.
