On 16 April 2014 11:55, Alex Bennée <alex.ben...@linaro.org> wrote:
>
> Peter Maydell <peter.mayd...@linaro.org> writes:
>
>> Can you attach a statically linked test case binary, please?
>
> I can reproduce with the source file. It looks like:
>
> @@ -7553,12 +7555,9 @@ static void
> disas_simd_scalar_two_reg_misc(DisasContext *s, uint32_t insn)
> }
> break;
> case 0x12: /* SQXTUN */
> - if (u) {
> - unallocated_encoding(s);
> - return;
> - }
> /* fall through */
>
> Fixes it.
However the ARM ARM, unless I'm misreading it, requires scalar-2-misc
SQXTUN to have U==1, so the correct fix should be to turn that "if (u)"
into "if (!u)" I think. (Opcode 0x12 u==0 isn't in the table so should undef.)
Better check we didn't make the same mistake in the vector-2-misc
decode as well.
thanks
-- PMM
