Remove the reference to the global variable, rtc_state, by passing
function argument to cmos_init_hd(), cmos_init().
And following d9c3231019a0fbacbe15dcb26a0e3708b726af77 which uses qemu_irq
for powerdown to eliminate nasty #ifdef (TARGET_xxx),
this patch removes #ifdef(TARGET_I386) and global variable rtc_state.
Signed-off-by: Isaku Yamahata <yamah...@valinux.co.jp>
Cc: Paolo Bonzini <bonz...@gnu.org>
Acked-by: Gerd Hoffmann <kra...@redhat.com>
---
hw/acpi_piix4.c | 8 ++++----
hw/mips_malta.c | 3 ++-
hw/pc.c | 27 ++++++++++++++-------------
hw/pc.h | 4 ++--
4 files changed, 22 insertions(+), 20 deletions(-)
diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c
index 30401a1..263f99a 100644
--- a/hw/acpi_piix4.c
+++ b/hw/acpi_piix4.c
@@ -45,6 +45,7 @@ typedef struct PIIX4PMState {
PMSMBus smb;
qemu_irq irq;
+ qemu_irq cmos_s3_resume;
} PIIX4PMState;
#define ACPI_ENABLE 0xf1
@@ -140,9 +141,7 @@ static void pm_ioport_writew(void *opaque, uint32_t addr,
uint32_t val)
s->pmsts |= (ACPI_BITMASK_WAKE_STATUS |
ACPI_BITMASK_POWER_BUTTON_STATUS);
qemu_system_reset_request();
-#if defined(TARGET_I386)
- cmos_set_s3_resume();
-#endif
+ qemu_irq_raise(s->cmos_s3_resume);
default:
break;
}
@@ -319,7 +318,7 @@ static void piix4_powerdown(void *opaque, int irq, int
power_failing)
}
i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
- qemu_irq sci_irq)
+ qemu_irq sci_irq, qemu_irq cmos_s3_resume)
{
PIIX4PMState *s;
uint8_t *pci_conf;
@@ -373,6 +372,7 @@ i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t
smb_io_base,
pm_smbus_init(NULL, &s->smb);
s->irq = sci_irq;
+ s->cmos_s3_resume = cmos_s3_resume;
qemu_register_reset(piix4_reset, s);
return s->smb.smbus;
diff --git a/hw/mips_malta.c b/hw/mips_malta.c
index 571d8ce..a507bc7 100644
--- a/hw/mips_malta.c
+++ b/hw/mips_malta.c
@@ -927,7 +927,8 @@ void mips_malta_init (ram_addr_t ram_size,
isa_bus_irqs(i8259);
pci_piix4_ide_init(pci_bus, hd, piix4_devfn + 1);
usb_uhci_piix4_init(pci_bus, piix4_devfn + 2);
- smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100,
isa_reserve_irq(9));
+ smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100,
+ isa_reserve_irq(9), NULL);
eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
for (i = 0; i < 8; i++) {
/* TODO: Populate SPD eeprom data. */
diff --git a/hw/pc.c b/hw/pc.c
index f5eb026..3ad9bbb 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -64,8 +64,6 @@
#define MAX_IDE_BUS 2
-static RTCState *rtc_state;
-
typedef struct isa_irq_state {
qemu_irq *i8259;
qemu_irq *ioapic;
@@ -191,9 +189,9 @@ static int cmos_get_fd_drive_type(int fd0)
return val;
}
-static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
+static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd,
+ RTCState *s)
{
- RTCState *s = rtc_state;
int cylinders, heads, sectors;
bdrv_get_geometry_hint(hd, &cylinders, &heads, §ors);
rtc_set_memory(s, type_ofs, 47);
@@ -256,9 +254,8 @@ static int pc_boot_set(void *opaque, const char
*boot_device)
/* hd_table must contain 4 block drivers */
static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
const char *boot_device, DriveInfo **hd_table,
- fdctrl_t *floppy_controller)
+ fdctrl_t *floppy_controller, RTCState *s)
{
- RTCState *s = rtc_state;
int nbds, bds[3] = { 0, };
int val;
int fd0, fd1, nb;
@@ -347,9 +344,9 @@ static void cmos_init(ram_addr_t ram_size, ram_addr_t
above_4g_mem_size,
rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f :
0));
if (hd_table[0])
- cmos_init_hd(0x19, 0x1b, hd_table[0]->bdrv);
+ cmos_init_hd(0x19, 0x1b, hd_table[0]->bdrv, s);
if (hd_table[1])
- cmos_init_hd(0x1a, 0x24, hd_table[1]->bdrv);
+ cmos_init_hd(0x1a, 0x24, hd_table[1]->bdrv, s);
val = 0;
for (i = 0; i < 4; i++) {
@@ -1017,6 +1014,7 @@ static void pc_init1(ram_addr_t ram_size,
DriveInfo *fd[MAX_FD];
void *fw_cfg;
fdctrl_t *floppy_controller;
+ RTCState *rtc_state;
PITState *pit;
if (ram_size >= 0xe0000000 ) {
@@ -1228,7 +1226,7 @@ static void pc_init1(ram_addr_t ram_size,
floppy_controller = fdctrl_init_isa(fd);
cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd,
- floppy_controller);
+ floppy_controller, rtc_state);
if (pci_enabled && usb_enabled) {
usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
@@ -1238,9 +1236,12 @@ static void pc_init1(ram_addr_t ram_size,
uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this
persistent */
i2c_bus *smbus;
+ qemu_irq cmos_s3_resume =
+ *qemu_allocate_irqs(cmos_set_s3_resume_fn, rtc_state, 1);
+
/* TODO: Populate SPD eeprom data. */
smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
- isa_reserve_irq(9));
+ isa_reserve_irq(9), cmos_s3_resume);
for (i = 0; i < 8; i++) {
DeviceState *eeprom;
eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
@@ -1305,10 +1306,10 @@ static void pc_init_isa(ram_addr_t ram_size,
/* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
BIOS will read it and start S3 resume at POST Entry */
-void cmos_set_s3_resume(void)
+void cmos_set_s3_resume_fn(void *opaque, int n, int level)
{
- if (rtc_state)
- rtc_set_memory(rtc_state, 0xF, 0xFE);
+ RTCState *rtc_state = opaque;
+ rtc_set_memory(rtc_state, 0xF, 0xFE);
}
static QEMUMachine pc_machine = {
diff --git a/hw/pc.h b/hw/pc.h
index cbecc07..4ad20c1 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -86,7 +86,7 @@ typedef struct RTCState RTCState;
RTCState *rtc_init(int base_year);
void rtc_set_memory(RTCState *s, int addr, int val);
void rtc_set_date(RTCState *s, const struct tm *tm);
-void cmos_set_s3_resume(void);
+void cmos_set_s3_resume_fn(void *opaque, int n, int level);
/* pc.c */
extern int fd_bootchk;
@@ -111,7 +111,7 @@ int acpi_table_add(const char *table_desc);
/* acpi_piix.c */
i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
- qemu_irq sci_irq);
+ qemu_irq sci_irq, qemu_irq cmos_set_s3_resume);
void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
void piix4_acpi_system_hot_add_init(PCIBus *bus);
--
1.6.5.4
