We base it on the OS endian, as reflected by the endianness of the
interrupt vectors (handled through the ILE bit in the LPCR register).
Using first_cpu to fetch the registers from KVM may look arbitrary
and awkward, but it is okay because KVM sets/unsets the ILE bit on
all CPUs.
Suggested-by: Benjamin Herrenschmidt <b...@kernel.crashing.org>
Signed-off-by: Rusty Russell <ru...@rustcorp.com.au>
[ rename virtio_get_byteswap to virtio_legacy_get_byteswap,
support both LE and BE host,
Greg Kurz <gk...@linux.vnet.ibm.com> ]
Signed-off-by: Greg Kurz <gk...@linux.vnet.ibm.com>
Reviewed-by: Alexander Graf <ag...@suse.de>
---
Alex,
Welcome back ! :)
Changes since v3:
- rename the helper according to v6 of the main LE virtio patchset
- prepare to support LE ppc64 host
- tentatively fixed the list of changes embeded in SoB lines
Cheers.
--
Greg
target-ppc/misc_helper.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/target-ppc/misc_helper.c b/target-ppc/misc_helper.c
index 2eb2fa6..4dbb274 100644
--- a/target-ppc/misc_helper.c
+++ b/target-ppc/misc_helper.c
@@ -20,6 +20,8 @@
#include "helper.h"
#include "helper_regs.h"
+#include "hw/virtio/virtio.h"
+#include "sysemu/kvm.h"
/*****************************************************************************/
/* SPR accesses */
@@ -120,3 +122,15 @@ void ppc_store_msr(CPUPPCState *env, target_ulong value)
{
hreg_store_msr(env, value, 0);
}
+
+bool virtio_legacy_get_byteswap(void)
+{
+ PowerPCCPU *cp = POWERPC_CPU(first_cpu);
+ CPUPPCState *env = &cp->env;
+ bool ile = env->spr[SPR_LPCR] & LPCR_ILE;
+#ifdef HOST_WORDS_BIGENDIAN
+ return ile;
+#else
+ return !ile;
+#endif
+}
